mips-cpc.c (5e2aa2ed08e2e280121dc7cf5609c87d464f12ef) mips-cpc.c (15d45cce3a0e0716fa49c768f887c6406dfb91f7)
1/*
2 * Copyright (C) 2013 Imagination Technologies
3 * Author: Paul Burton <paul.burton@imgtec.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.

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16#include <asm/mips-cpc.h>
17
18void __iomem *mips_cpc_base;
19
20static DEFINE_PER_CPU_ALIGNED(spinlock_t, cpc_core_lock);
21
22static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);
23
1/*
2 * Copyright (C) 2013 Imagination Technologies
3 * Author: Paul Burton <paul.burton@imgtec.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.

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16#include <asm/mips-cpc.h>
17
18void __iomem *mips_cpc_base;
19
20static DEFINE_PER_CPU_ALIGNED(spinlock_t, cpc_core_lock);
21
22static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);
23
24phys_t __weak mips_cpc_phys_base(void)
24phys_addr_t __weak mips_cpc_phys_base(void)
25{
26 u32 cpc_base;
27
28 if (!mips_cm_present())
29 return 0;
30
31 if (!(read_gcr_cpc_status() & CM_GCR_CPC_STATUS_EX_MSK))
32 return 0;

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39 /* Otherwise, give it the default address & enable it */
40 cpc_base = mips_cpc_default_phys_base();
41 write_gcr_cpc_base(cpc_base | CM_GCR_CPC_BASE_CPCEN_MSK);
42 return cpc_base;
43}
44
45int mips_cpc_probe(void)
46{
25{
26 u32 cpc_base;
27
28 if (!mips_cm_present())
29 return 0;
30
31 if (!(read_gcr_cpc_status() & CM_GCR_CPC_STATUS_EX_MSK))
32 return 0;

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39 /* Otherwise, give it the default address & enable it */
40 cpc_base = mips_cpc_default_phys_base();
41 write_gcr_cpc_base(cpc_base | CM_GCR_CPC_BASE_CPCEN_MSK);
42 return cpc_base;
43}
44
45int mips_cpc_probe(void)
46{
47 phys_t addr;
47 phys_addr_t addr;
48 unsigned cpu;
49
50 for_each_possible_cpu(cpu)
51 spin_lock_init(&per_cpu(cpc_core_lock, cpu));
52
53 addr = mips_cpc_phys_base();
54 if (!addr)
55 return -ENODEV;

--- 25 unchanged lines hidden --- 		48 unsigned cpu;
49
50 for_each_possible_cpu(cpu)
51 spin_lock_init(&per_cpu(cpc_core_lock, cpu));
52
53 addr = mips_cpc_phys_base();
54 if (!addr)
55 return -ENODEV;

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