cpu-probe.c (7507445b1993087d2a6ef3e30e3eaeb2da40dbc8) cpu-probe.c (38dffe1e4dde1d3174fdce09d67370412843ebb5)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Processor capabilities determination functions.
4 *
5 * Copyright (C) xxxx the Anonymous
6 * Copyright (C) 1994 - 2006 Ralf Baechle
7 * Copyright (C) 2003, 2004 Maciej W. Rozycki
8 * Copyright (C) 2001, 2004, 2011, 2012 MIPS Technologies, Inc.

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1521 }
1522 set_isa(c, MIPS_CPU_ISA_IV);
1523 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
1524 MIPS_CPU_FPU | MIPS_CPU_32FPR |
1525 MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
1526 MIPS_CPU_LLSC | MIPS_CPU_BP_GHIST;
1527 c->tlbsize = 64;
1528 break;
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Processor capabilities determination functions.
4 *
5 * Copyright (C) xxxx the Anonymous
6 * Copyright (C) 1994 - 2006 Ralf Baechle
7 * Copyright (C) 2003, 2004 Maciej W. Rozycki
8 * Copyright (C) 2001, 2004, 2011, 2012 MIPS Technologies, Inc.

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1521 }
1522 set_isa(c, MIPS_CPU_ISA_IV);
1523 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
1524 MIPS_CPU_FPU | MIPS_CPU_32FPR |
1525 MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
1526 MIPS_CPU_LLSC | MIPS_CPU_BP_GHIST;
1527 c->tlbsize = 64;
1528 break;
1529 case PRID_IMP_LOONGSON_64C: /* Loongson-2/3 */
1529 case PRID_IMP_LOONGSON_64: /* Loongson-2/3 */
1530 switch (c->processor_id & PRID_REV_MASK) {
1531 case PRID_REV_LOONGSON2E:
1532 c->cputype = CPU_LOONGSON2;
1533 __cpu_name[cpu] = "ICT Loongson-2";
1534 set_elf_platform(cpu, "loongson2e");
1535 set_isa(c, MIPS_CPU_ISA_III);
1536 c->fpu_msk31 |= FPU_CSR_CONDX;
1537 break;

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1560 MIPS_ASE_LOONGSON_EXT);
1561 break;
1562 }
1563
1564 c->options = R4K_OPTS |
1565 MIPS_CPU_FPU | MIPS_CPU_LLSC |
1566 MIPS_CPU_32FPR;
1567 c->tlbsize = 64;
1530 switch (c->processor_id & PRID_REV_MASK) {
1531 case PRID_REV_LOONGSON2E:
1532 c->cputype = CPU_LOONGSON2;
1533 __cpu_name[cpu] = "ICT Loongson-2";
1534 set_elf_platform(cpu, "loongson2e");
1535 set_isa(c, MIPS_CPU_ISA_III);
1536 c->fpu_msk31 |= FPU_CSR_CONDX;
1537 break;

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1560 MIPS_ASE_LOONGSON_EXT);
1561 break;
1562 }
1563
1564 c->options = R4K_OPTS |
1565 MIPS_CPU_FPU | MIPS_CPU_LLSC |
1566 MIPS_CPU_32FPR;
1567 c->tlbsize = 64;
1568 set_cpu_asid_mask(c, MIPS_ENTRYHI_ASID);
1569 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
1570 break;
1571 case PRID_IMP_LOONGSON_32: /* Loongson-1 */
1572 decode_configs(c);
1573
1574 c->cputype = CPU_LOONGSON1;
1575
1576 switch (c->processor_id & PRID_REV_MASK) {

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1899 c->cputype = CPU_UNKNOWN;
1900 break;
1901 }
1902}
1903
1904static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
1905{
1906 switch (c->processor_id & PRID_IMP_MASK) {
1568 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
1569 break;
1570 case PRID_IMP_LOONGSON_32: /* Loongson-1 */
1571 decode_configs(c);
1572
1573 c->cputype = CPU_LOONGSON1;
1574
1575 switch (c->processor_id & PRID_REV_MASK) {

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1898 c->cputype = CPU_UNKNOWN;
1899 break;
1900 }
1901}
1902
1903static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
1904{
1905 switch (c->processor_id & PRID_IMP_MASK) {
1907 case PRID_IMP_LOONGSON_64C: /* Loongson-2/3 */
1906 case PRID_IMP_LOONGSON_64: /* Loongson-2/3 */
1908 switch (c->processor_id & PRID_REV_MASK) {
1909 case PRID_REV_LOONGSON3A_R2_0:
1910 case PRID_REV_LOONGSON3A_R2_1:
1911 c->cputype = CPU_LOONGSON3;
1912 __cpu_name[cpu] = "ICT Loongson-3";
1913 set_elf_platform(cpu, "loongson3a");
1914 set_isa(c, MIPS_CPU_ISA_M64R2);
1915 break;

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1923 }
1924
1925 decode_configs(c);
1926 c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
1927 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
1928 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
1929 MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
1930 break;
1907 switch (c->processor_id & PRID_REV_MASK) {
1908 case PRID_REV_LOONGSON3A_R2_0:
1909 case PRID_REV_LOONGSON3A_R2_1:
1910 c->cputype = CPU_LOONGSON3;
1911 __cpu_name[cpu] = "ICT Loongson-3";
1912 set_elf_platform(cpu, "loongson3a");
1913 set_isa(c, MIPS_CPU_ISA_M64R2);
1914 break;

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1922 }
1923
1924 decode_configs(c);
1925 c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
1926 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
1927 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
1928 MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
1929 break;
1931 case PRID_IMP_LOONGSON_64G:
1932 c->cputype = CPU_LOONGSON3;
1933 __cpu_name[cpu] = "ICT Loongson-3";
1934 set_elf_platform(cpu, "loongson3a");
1935 set_isa(c, MIPS_CPU_ISA_M64R2);
1936 decode_configs(c);
1937 c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
1938 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
1939 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
1940 MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
1941 break;
1942 default:
1943 panic("Unknown Loongson Processor ID!");
1944 break;
1945 }
1946}
1947
1948static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
1949{

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2187
2188 if (cpu_has_msa) {
2189 c->msa_id = cpu_get_msa_id();
2190 WARN(c->msa_id & MSA_IR_WRPF,
2191 "Vector register partitioning unimplemented!");
2192 elf_hwcap |= HWCAP_MIPS_MSA;
2193 }
2194
1930 default:
1931 panic("Unknown Loongson Processor ID!");
1932 break;
1933 }
1934}
1935
1936static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
1937{

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2175
2176 if (cpu_has_msa) {
2177 c->msa_id = cpu_get_msa_id();
2178 WARN(c->msa_id & MSA_IR_WRPF,
2179 "Vector register partitioning unimplemented!");
2180 elf_hwcap |= HWCAP_MIPS_MSA;
2181 }
2182
2183 if (cpu_has_mips16)
2184 elf_hwcap |= HWCAP_MIPS_MIPS16;
2185
2186 if (cpu_has_mdmx)
2187 elf_hwcap |= HWCAP_MIPS_MDMX;
2188
2189 if (cpu_has_mips3d)
2190 elf_hwcap |= HWCAP_MIPS_MIPS3D;
2191
2192 if (cpu_has_smartmips)
2193 elf_hwcap |= HWCAP_MIPS_SMARTMIPS;
2194
2195 if (cpu_has_dsp)
2196 elf_hwcap |= HWCAP_MIPS_DSP;
2197
2198 if (cpu_has_dsp2)
2199 elf_hwcap |= HWCAP_MIPS_DSP2;
2200
2201 if (cpu_has_dsp3)
2202 elf_hwcap |= HWCAP_MIPS_DSP3;
2203
2204 if (cpu_has_mips16e2)
2205 elf_hwcap |= HWCAP_MIPS_MIPS16E2;
2206
2207 if (cpu_has_loongson_mmi)
2208 elf_hwcap |= HWCAP_LOONGSON_MMI;
2209
2210 if (cpu_has_loongson_ext)
2211 elf_hwcap |= HWCAP_LOONGSON_EXT;
2212
2213 if (cpu_has_loongson_ext2)
2214 elf_hwcap |= HWCAP_LOONGSON_EXT2;
2215
2195 if (cpu_has_vz)
2196 cpu_probe_vz(c);
2197
2198 cpu_probe_vmbits(c);
2199
2200#ifdef CONFIG_64BIT
2201 if (cpu == 0)
2202 __ua_limit = ~((1ull << cpu_vmbits) - 1);

--- 46 unchanged lines hidden --- 		2216 if (cpu_has_vz)
2217 cpu_probe_vz(c);
2218
2219 cpu_probe_vmbits(c);
2220
2221#ifdef CONFIG_64BIT
2222 if (cpu == 0)
2223 __ua_limit = ~((1ull << cpu_vmbits) - 1);

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