timex.h (4f2c0a4acffbec01079c28f839422e64ddeff004) timex.h (2f9060b1db4aa2c21c248e34476d8936a2b69cf6)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 1999, 2003 by Ralf Baechle
7 * Copyright (C) 2014 by Maciej W. Rozycki
8 */

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41
42/*
43 * On R4000/R4400 an erratum exists such that if the cycle counter is
44 * read in the exact moment that it is matching the compare register,
45 * no interrupt will be generated.
46 *
47 * There is a suggested workaround and also the erratum can't strike if
48 * the compare interrupt isn't being used as the clock source device.
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 1999, 2003 by Ralf Baechle
7 * Copyright (C) 2014 by Maciej W. Rozycki
8 */

--- 32 unchanged lines hidden (view full) ---

41
42/*
43 * On R4000/R4400 an erratum exists such that if the cycle counter is
44 * read in the exact moment that it is matching the compare register,
45 * no interrupt will be generated.
46 *
47 * There is a suggested workaround and also the erratum can't strike if
48 * the compare interrupt isn't being used as the clock source device.
49 * However for now the implementaton of this function doesn't get these
49 * However for now the implementation of this function doesn't get these
50 * fine details right.
51 */
52static inline int can_use_mips_counter(unsigned int prid)
53{
54 int comp = (prid & PRID_COMP_MASK) != PRID_COMP_LEGACY;
55
56 if (__builtin_constant_p(cpu_has_counter) && !cpu_has_counter)
57 return 0;

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51 */
52static inline int can_use_mips_counter(unsigned int prid)
53{
54 int comp = (prid & PRID_COMP_MASK) != PRID_COMP_LEGACY;
55
56 if (__builtin_constant_p(cpu_has_counter) && !cpu_has_counter)
57 return 0;

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