| mipsregs.h (ee5db7e47faccd07a8a17f73afb30345f8331e61) | mipsregs.h (842dfc11ea9a21f9825167c8a4f2834b205b0a79) |
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| 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle 7 * Copyright (C) 2000 Silicon Graphics, Inc. 8 * Modified for further R[236]000 support by Paul M. Antoine, 1996. --- 1310 unchanged lines hidden (view full) --- 1319#define write_c0_brcm_bootvec(val) __write_32bit_c0_register($22, 4, val) 1320 1321#define read_c0_brcm_sleepcount() __read_32bit_c0_register($22, 7) 1322#define write_c0_brcm_sleepcount(val) __write_32bit_c0_register($22, 7, val) 1323 1324/* 1325 * Macros to access the floating point coprocessor control registers 1326 */ | 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle 7 * Copyright (C) 2000 Silicon Graphics, Inc. 8 * Modified for further R[236]000 support by Paul M. Antoine, 1996. --- 1310 unchanged lines hidden (view full) --- 1319#define write_c0_brcm_bootvec(val) __write_32bit_c0_register($22, 4, val) 1320 1321#define read_c0_brcm_sleepcount() __read_32bit_c0_register($22, 7) 1322#define write_c0_brcm_sleepcount(val) __write_32bit_c0_register($22, 7, val) 1323 1324/* 1325 * Macros to access the floating point coprocessor control registers 1326 */ |
| 1327#define read_32bit_cp1_register(source) \ | 1327#define _read_32bit_cp1_register(source, gas_hardfloat) \ |
| 1328({ \ 1329 int __res; \ 1330 \ 1331 __asm__ __volatile__( \ 1332 " .set push \n" \ 1333 " .set reorder \n" \ 1334 " # gas fails to assemble cfc1 for some archs, \n" \ 1335 " # like Octeon. \n" \ 1336 " .set mips1 \n" \ | 1328({ \ 1329 int __res; \ 1330 \ 1331 __asm__ __volatile__( \ 1332 " .set push \n" \ 1333 " .set reorder \n" \ 1334 " # gas fails to assemble cfc1 for some archs, \n" \ 1335 " # like Octeon. \n" \ 1336 " .set mips1 \n" \ |
| 1337 " "STR(gas_hardfloat)" \n" \ |
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| 1337 " cfc1 %0,"STR(source)" \n" \ 1338 " .set pop \n" \ 1339 : "=r" (__res)); \ 1340 __res; \ 1341}) 1342 | 1338 " cfc1 %0,"STR(source)" \n" \ 1339 " .set pop \n" \ 1340 : "=r" (__res)); \ 1341 __res; \ 1342}) 1343 |
| 1344#ifdef GAS_HAS_SET_HARDFLOAT 1345#define read_32bit_cp1_register(source) \ 1346 _read_32bit_cp1_register(source, .set hardfloat) 1347#else 1348#define read_32bit_cp1_register(source) \ 1349 _read_32bit_cp1_register(source, ) 1350#endif 1351 |
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| 1343#ifdef HAVE_AS_DSP 1344#define rddsp(mask) \ 1345({ \ 1346 unsigned int __dspctl; \ 1347 \ 1348 __asm__ __volatile__( \ 1349 " .set push \n" \ 1350 " .set dsp \n" \ --- 512 unchanged lines hidden --- | 1352#ifdef HAVE_AS_DSP 1353#define rddsp(mask) \ 1354({ \ 1355 unsigned int __dspctl; \ 1356 \ 1357 __asm__ __volatile__( \ 1358 " .set push \n" \ 1359 " .set dsp \n" \ --- 512 unchanged lines hidden --- |