| time.c (c1f3ee120bb61045b1c0a3ead620d1d65af47130) | time.c (4247417d8457b326ede001cb74af8570b5aa302b) |
|---|---|
| 1/* 2 * linux/arch/mips/dec/time.c 3 * 4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 5 * Copyright (C) 2000, 2003 Maciej W. Rozycki 6 * 7 * This file contains the time handling details for PC-style clocks as 8 * found in some MIPS systems. --- 151 unchanged lines hidden (view full) --- 160 161 162void __init plat_time_init(void) 163{ 164 mips_timer_ack = dec_timer_ack; 165 166 if (!cpu_has_counter && IOASIC) 167 /* For pre-R4k systems we use the I/O ASIC's counter. */ | 1/* 2 * linux/arch/mips/dec/time.c 3 * 4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 5 * Copyright (C) 2000, 2003 Maciej W. Rozycki 6 * 7 * This file contains the time handling details for PC-style clocks as 8 * found in some MIPS systems. --- 151 unchanged lines hidden (view full) --- 160 161 162void __init plat_time_init(void) 163{ 164 mips_timer_ack = dec_timer_ack; 165 166 if (!cpu_has_counter && IOASIC) 167 /* For pre-R4k systems we use the I/O ASIC's counter. */ |
| 168 clocksource_mips.read = dec_ioasic_hpt_read; | 168 dec_ioasic_clocksource_init(); |
| 169 170 /* Set up the rate of periodic DS1287 interrupts. */ 171 CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); 172} 173 174void __init plat_timer_setup(struct irqaction *irq) 175{ 176 setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); 177 178 /* Enable periodic DS1287 interrupts. */ 179 CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B); 180} | 169 170 /* Set up the rate of periodic DS1287 interrupts. */ 171 CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); 172} 173 174void __init plat_timer_setup(struct irqaction *irq) 175{ 176 setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); 177 178 /* Enable periodic DS1287 interrupts. */ 179 CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B); 180} |