bcm7362.dtsi (01b944fe1cd4e21a2a9ed51adbdbafe2d5e905ba) bcm7362.dtsi (f50cbf5329e045e8d69046ea9093e6bafdc09516)
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7362";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;

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82 "rdc_0", "raaga_0",
83 "avd_0", "jtag_0";
84 };
85
86 upg_irq0_intc: upg_irq0_intc@406600 {
87 compatible = "brcm,bcm7120-l2-intc";
88 reg = <0x406600 0x8>;
89
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7362";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;

--- 73 unchanged lines hidden (view full) ---

82 "rdc_0", "raaga_0",
83 "avd_0", "jtag_0";
84 };
85
86 upg_irq0_intc: upg_irq0_intc@406600 {
87 compatible = "brcm,bcm7120-l2-intc";
88 reg = <0x406600 0x8>;
89
90 brcm,int-map-mask = <0x44>;
90 brcm,int-map-mask = <0x44>, <0x7000000>;
91 brcm,int-fwd-mask = <0x70000>;
92
93 interrupt-controller;
94 #interrupt-cells = <1>;
95
96 interrupt-parent = <&periph_intc>;
91 brcm,int-fwd-mask = <0x70000>;
92
93 interrupt-controller;
94 #interrupt-cells = <1>;
95
96 interrupt-parent = <&periph_intc>;
97 interrupts = <56>;
97 interrupts = <56>, <54>;
98 interrupt-names = "upg_main", "upg_bsc";
98 };
99
99 };
100
101 upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
102 compatible = "brcm,bcm7120-l2-intc";
103 reg = <0x408b80 0x8>;
104
105 brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
106 brcm,int-fwd-mask = <0>;
107 brcm,irq-can-wake;
108
109 interrupt-controller;
110 #interrupt-cells = <1>;
111
112 interrupt-parent = <&periph_intc>;
113 interrupts = <57>, <55>, <59>;
114 interrupt-names = "upg_main_aon", "upg_bsc_aon",
115 "upg_spi";
116 };
117
100 sun_top_ctrl: syscon@404000 {
101 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
102 reg = <0x404000 0x51c>;
103 little-endian;
104 };
105
106 reboot {
107 compatible = "brcm,brcmstb-reboot";

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139 reg-shift = <0x2>;
140 native-endian;
141 interrupt-parent = <&periph_intc>;
142 interrupts = <63>;
143 clocks = <&uart_clk>;
144 status = "disabled";
145 };
146
118 sun_top_ctrl: syscon@404000 {
119 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
120 reg = <0x404000 0x51c>;
121 little-endian;
122 };
123
124 reboot {
125 compatible = "brcm,brcmstb-reboot";

--- 31 unchanged lines hidden (view full) ---

157 reg-shift = <0x2>;
158 native-endian;
159 interrupt-parent = <&periph_intc>;
160 interrupts = <63>;
161 clocks = <&uart_clk>;
162 status = "disabled";
163 };
164
165 bsca: i2c@406200 {
166 clock-frequency = <390000>;
167 compatible = "brcm,brcmstb-i2c";
168 interrupt-parent = <&upg_irq0_intc>;
169 reg = <0x406200 0x58>;
170 interrupts = <24>;
171 interrupt-names = "upg_bsca";
172 status = "disabled";
173 };
174
175 bscb: i2c@406280 {
176 clock-frequency = <390000>;
177 compatible = "brcm,brcmstb-i2c";
178 interrupt-parent = <&upg_irq0_intc>;
179 reg = <0x406280 0x58>;
180 interrupts = <25>;
181 interrupt-names = "upg_bscb";
182 status = "disabled";
183 };
184
185 bscd: i2c@408980 {
186 clock-frequency = <390000>;
187 compatible = "brcm,brcmstb-i2c";
188 interrupt-parent = <&upg_aon_irq0_intc>;
189 reg = <0x408980 0x58>;
190 interrupts = <27>;
191 interrupt-names = "upg_bscd";
192 status = "disabled";
193 };
194
147 enet0: ethernet@430000 {
148 phy-mode = "internal";
149 phy-handle = <&phy1>;
150 mac-address = [ 00 10 18 36 23 1a ];
151 compatible = "brcm,genet-v2";
152 #address-cells = <0x1>;
153 #size-cells = <0x1>;
154 reg = <0x430000 0x4c8c>;

--- 39 unchanged lines hidden --- 		195 enet0: ethernet@430000 {
196 phy-mode = "internal";
197 phy-handle = <&phy1>;
198 mac-address = [ 00 10 18 36 23 1a ];
199 compatible = "brcm,genet-v2";
200 #address-cells = <0x1>;
201 #size-cells = <0x1>;
202 reg = <0x430000 0x4c8c>;

--- 39 unchanged lines hidden ---