irq.c (cf9ce948f47640797bd19980e1d99c6d17d0bdc3) | irq.c (2c8aaf71b0a4738ae8cb70d9367089bdb892aea3) |
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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7 * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr> 8 */ --- 68 unchanged lines hidden (view full) --- 77#define irq_bits 32 78#define is_ext_irq_cascaded 1 79#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) 80#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) 81#define ext_irq_count 4 82#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358 83#define ext_irq_cfg_reg2 0 84#endif | 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7 * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr> 8 */ --- 68 unchanged lines hidden (view full) --- 77#define irq_bits 32 78#define is_ext_irq_cascaded 1 79#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) 80#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) 81#define ext_irq_count 4 82#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358 83#define ext_irq_cfg_reg2 0 84#endif |
85#ifdef CONFIG_BCM63XX_CPU_6362 86#define irq_stat_reg PERF_IRQSTAT_6362_REG 87#define irq_mask_reg PERF_IRQMASK_6362_REG 88#define irq_bits 64 89#define is_ext_irq_cascaded 1 90#define ext_irq_start (BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE) 91#define ext_irq_end (BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE) 92#define ext_irq_count 4 93#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6362 94#define ext_irq_cfg_reg2 0 95#endif |
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85#ifdef CONFIG_BCM63XX_CPU_6368 86#define irq_stat_reg PERF_IRQSTAT_6368_REG 87#define irq_mask_reg PERF_IRQMASK_6368_REG 88#define irq_bits 64 89#define is_ext_irq_cascaded 1 90#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE) 91#define ext_irq_end (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE) 92#define ext_irq_count 6 --- 72 unchanged lines hidden (view full) --- 165 irq_mask_addr += PERF_IRQMASK_6358_REG; 166 irq_bits = 32; 167 ext_irq_count = 4; 168 is_ext_irq_cascaded = 1; 169 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; 170 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; 171 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358; 172 break; | 96#ifdef CONFIG_BCM63XX_CPU_6368 97#define irq_stat_reg PERF_IRQSTAT_6368_REG 98#define irq_mask_reg PERF_IRQMASK_6368_REG 99#define irq_bits 64 100#define is_ext_irq_cascaded 1 101#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE) 102#define ext_irq_end (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE) 103#define ext_irq_count 6 --- 72 unchanged lines hidden (view full) --- 176 irq_mask_addr += PERF_IRQMASK_6358_REG; 177 irq_bits = 32; 178 ext_irq_count = 4; 179 is_ext_irq_cascaded = 1; 180 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; 181 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; 182 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358; 183 break; |
184 case BCM6362_CPU_ID: 185 irq_stat_addr += PERF_IRQSTAT_6362_REG; 186 irq_mask_addr += PERF_IRQMASK_6362_REG; 187 irq_bits = 64; 188 ext_irq_count = 4; 189 is_ext_irq_cascaded = 1; 190 ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE; 191 ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE; 192 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362; 193 break; |
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173 case BCM6368_CPU_ID: 174 irq_stat_addr += PERF_IRQSTAT_6368_REG; 175 irq_mask_addr += PERF_IRQMASK_6368_REG; 176 irq_bits = 64; 177 ext_irq_count = 6; 178 is_ext_irq_cascaded = 1; 179 ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; 180 ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; --- 272 unchanged lines hidden (view full) --- 453 else 454 reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); 455 break; 456 457 case BCM6328_CPU_ID: 458 case BCM6338_CPU_ID: 459 case BCM6345_CPU_ID: 460 case BCM6358_CPU_ID: | 194 case BCM6368_CPU_ID: 195 irq_stat_addr += PERF_IRQSTAT_6368_REG; 196 irq_mask_addr += PERF_IRQMASK_6368_REG; 197 irq_bits = 64; 198 ext_irq_count = 6; 199 is_ext_irq_cascaded = 1; 200 ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; 201 ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; --- 272 unchanged lines hidden (view full) --- 474 else 475 reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); 476 break; 477 478 case BCM6328_CPU_ID: 479 case BCM6338_CPU_ID: 480 case BCM6345_CPU_ID: 481 case BCM6358_CPU_ID: |
482 case BCM6362_CPU_ID: |
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461 case BCM6368_CPU_ID: 462 if (levelsense) 463 reg |= EXTIRQ_CFG_LEVELSENSE(irq); 464 else 465 reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); 466 if (sense) 467 reg |= EXTIRQ_CFG_SENSE(irq); 468 else --- 70 unchanged lines hidden --- | 483 case BCM6368_CPU_ID: 484 if (levelsense) 485 reg |= EXTIRQ_CFG_LEVELSENSE(irq); 486 else 487 reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); 488 if (sense) 489 reg |= EXTIRQ_CFG_SENSE(irq); 490 else --- 70 unchanged lines hidden --- |