irq.c (681e4a5e13c1c8315694eb4f44e0cdd84c9082d2) irq.c (e5766aea5b9b7519654261c27b639f567b5415b4)
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
8 */

--- 13 unchanged lines hidden (view full) ---

22static void __dispatch_internal(void) __maybe_unused;
23static void __dispatch_internal_64(void) __maybe_unused;
24static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
25static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
26static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
27static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
28
29#ifndef BCMCPU_RUNTIME_DETECT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
8 */

--- 13 unchanged lines hidden (view full) ---

22static void __dispatch_internal(void) __maybe_unused;
23static void __dispatch_internal_64(void) __maybe_unused;
24static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
25static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
26static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
27static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
28
29#ifndef BCMCPU_RUNTIME_DETECT
30#ifdef CONFIG_BCM63XX_CPU_6328
31#define irq_stat_reg PERF_IRQSTAT_6328_REG
32#define irq_mask_reg PERF_IRQMASK_6328_REG
33#define irq_bits 64
34#define is_ext_irq_cascaded 1
35#define ext_irq_start (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
36#define ext_irq_end (BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE)
37#define ext_irq_count 4
38#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6328
39#define ext_irq_cfg_reg2 0
40#endif
30#ifdef CONFIG_BCM63XX_CPU_6338
31#define irq_stat_reg PERF_IRQSTAT_6338_REG
32#define irq_mask_reg PERF_IRQMASK_6338_REG
33#define irq_bits 32
34#define is_ext_irq_cascaded 0
35#define ext_irq_start 0
36#define ext_irq_end 0
37#define ext_irq_count 4

--- 75 unchanged lines hidden (view full) ---

113static void bcm63xx_init_irq(void)
114{
115 int irq_bits;
116
117 irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
118 irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
119
120 switch (bcm63xx_get_cpu_id()) {
41#ifdef CONFIG_BCM63XX_CPU_6338
42#define irq_stat_reg PERF_IRQSTAT_6338_REG
43#define irq_mask_reg PERF_IRQMASK_6338_REG
44#define irq_bits 32
45#define is_ext_irq_cascaded 0
46#define ext_irq_start 0
47#define ext_irq_end 0
48#define ext_irq_count 4

--- 75 unchanged lines hidden (view full) ---

124static void bcm63xx_init_irq(void)
125{
126 int irq_bits;
127
128 irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
129 irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
130
131 switch (bcm63xx_get_cpu_id()) {
132 case BCM6328_CPU_ID:
133 irq_stat_addr += PERF_IRQSTAT_6328_REG;
134 irq_mask_addr += PERF_IRQMASK_6328_REG;
135 irq_bits = 64;
136 ext_irq_count = 4;
137 is_ext_irq_cascaded = 1;
138 ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
139 ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
140 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
141 break;
121 case BCM6338_CPU_ID:
122 irq_stat_addr += PERF_IRQSTAT_6338_REG;
123 irq_mask_addr += PERF_IRQMASK_6338_REG;
124 irq_bits = 32;
125 break;
126 case BCM6345_CPU_ID:
127 irq_stat_addr += PERF_IRQSTAT_6345_REG;
128 irq_mask_addr += PERF_IRQMASK_6345_REG;

--- 377 unchanged lines hidden --- 		142 case BCM6338_CPU_ID:
143 irq_stat_addr += PERF_IRQSTAT_6338_REG;
144 irq_mask_addr += PERF_IRQMASK_6338_REG;
145 irq_bits = 32;
146 break;
147 case BCM6345_CPU_ID:
148 irq_stat_addr += PERF_IRQSTAT_6345_REG;
149 irq_mask_addr += PERF_IRQMASK_6345_REG;

--- 377 unchanged lines hidden ---