clock.c (837f036c8ab201965b9fb0f6b743a415f555493f) | clock.c (2310780244d5c3b6cc843d4cc0b63332016678a0) |
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1/* 2 * Atheros AR71XX/AR724X/AR913X common routines 3 * 4 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> 5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 6 * 7 * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP 8 * --- 386 unchanged lines hidden (view full) --- 395 ath79_ddr_clk.rate / 1000000, 396 (ath79_ddr_clk.rate / 1000) % 1000, 397 ath79_ahb_clk.rate / 1000000, 398 (ath79_ahb_clk.rate / 1000) % 1000, 399 ath79_ref_clk.rate / 1000000, 400 (ath79_ref_clk.rate / 1000) % 1000); 401} 402 | 1/* 2 * Atheros AR71XX/AR724X/AR913X common routines 3 * 4 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> 5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 6 * 7 * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP 8 * --- 386 unchanged lines hidden (view full) --- 395 ath79_ddr_clk.rate / 1000000, 396 (ath79_ddr_clk.rate / 1000) % 1000, 397 ath79_ahb_clk.rate / 1000000, 398 (ath79_ahb_clk.rate / 1000) % 1000, 399 ath79_ref_clk.rate / 1000000, 400 (ath79_ref_clk.rate / 1000) % 1000); 401} 402 |
403unsigned long __init 404ath79_get_sys_clk_rate(const char *id) 405{ 406 struct clk *clk; 407 unsigned long rate; 408 409 clk = clk_get(NULL, id); 410 if (IS_ERR(clk)) 411 panic("unable to get %s clock, err=%d", id, (int) PTR_ERR(clk)); 412 413 rate = clk_get_rate(clk); 414 clk_put(clk); 415 416 return rate; 417} 418 |
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403/* 404 * Linux clock API 405 */ 406struct clk *clk_get(struct device *dev, const char *id) 407{ 408 if (!strcmp(id, "ref")) 409 return &ath79_ref_clk; 410 --- 40 unchanged lines hidden --- | 419/* 420 * Linux clock API 421 */ 422struct clk *clk_get(struct device *dev, const char *id) 423{ 424 if (!strcmp(id, "ref")) 425 return &ath79_ref_clk; 426 --- 40 unchanged lines hidden --- |