| Kconfig (bae6692c24236d0203f88a444986d86437a858fa) | Kconfig (d30a2b47d4c2b75573d93f60655d48ba8e3ed2b3) |
|---|---|
| 1config MIPS 2 bool 3 default y 4 select ARCH_SUPPORTS_UPROBES 5 select ARCH_MIGHT_HAVE_PC_PARPORT 6 select ARCH_MIGHT_HAVE_PC_SERIO 7 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 8 select ARCH_USE_BUILTIN_BSWAP --- 65 unchanged lines hidden (view full) --- 74 select ARCH_PHYS_ADDR_T_64BIT 75 select CEVT_R4K 76 select CSRC_R4K 77 select IRQ_MIPS_CPU 78 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 79 select SYS_HAS_CPU_MIPS32_R1 80 select SYS_SUPPORTS_32BIT_KERNEL 81 select SYS_SUPPORTS_APM_EMULATION | 1config MIPS 2 bool 3 default y 4 select ARCH_SUPPORTS_UPROBES 5 select ARCH_MIGHT_HAVE_PC_PARPORT 6 select ARCH_MIGHT_HAVE_PC_SERIO 7 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 8 select ARCH_USE_BUILTIN_BSWAP --- 65 unchanged lines hidden (view full) --- 74 select ARCH_PHYS_ADDR_T_64BIT 75 select CEVT_R4K 76 select CSRC_R4K 77 select IRQ_MIPS_CPU 78 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 79 select SYS_HAS_CPU_MIPS32_R1 80 select SYS_SUPPORTS_32BIT_KERNEL 81 select SYS_SUPPORTS_APM_EMULATION |
| 82 select ARCH_REQUIRE_GPIOLIB | 82 select GPIOLIB |
| 83 select SYS_SUPPORTS_ZBOOT 84 select COMMON_CLK 85 86config AR7 87 bool "Texas Instruments AR7" 88 select BOOT_ELF32 89 select DMA_NONCOHERENT 90 select CEVT_R4K 91 select CSRC_R4K 92 select IRQ_MIPS_CPU 93 select NO_EXCEPT_FILL 94 select SWAP_IO_SPACE 95 select SYS_HAS_CPU_MIPS32_R1 96 select SYS_HAS_EARLY_PRINTK 97 select SYS_SUPPORTS_32BIT_KERNEL 98 select SYS_SUPPORTS_LITTLE_ENDIAN 99 select SYS_SUPPORTS_MIPS16 100 select SYS_SUPPORTS_ZBOOT_UART16550 | 83 select SYS_SUPPORTS_ZBOOT 84 select COMMON_CLK 85 86config AR7 87 bool "Texas Instruments AR7" 88 select BOOT_ELF32 89 select DMA_NONCOHERENT 90 select CEVT_R4K 91 select CSRC_R4K 92 select IRQ_MIPS_CPU 93 select NO_EXCEPT_FILL 94 select SWAP_IO_SPACE 95 select SYS_HAS_CPU_MIPS32_R1 96 select SYS_HAS_EARLY_PRINTK 97 select SYS_SUPPORTS_32BIT_KERNEL 98 select SYS_SUPPORTS_LITTLE_ENDIAN 99 select SYS_SUPPORTS_MIPS16 100 select SYS_SUPPORTS_ZBOOT_UART16550 |
| 101 select ARCH_REQUIRE_GPIOLIB | 101 select GPIOLIB |
| 102 select VLYNQ 103 select HAVE_CLK 104 help 105 Support for the Texas Instruments AR7 System-on-a-Chip 106 family: TNETD7100, 7200 and 7300. 107 108config ATH25 109 bool "Atheros AR231x/AR531x SoC support" --- 7 unchanged lines hidden (view full) --- 117 select SYS_SUPPORTS_32BIT_KERNEL 118 select SYS_HAS_EARLY_PRINTK 119 help 120 Support for Atheros AR231x and Atheros AR531x based boards 121 122config ATH79 123 bool "Atheros AR71XX/AR724X/AR913X based boards" 124 select ARCH_HAS_RESET_CONTROLLER | 102 select VLYNQ 103 select HAVE_CLK 104 help 105 Support for the Texas Instruments AR7 System-on-a-Chip 106 family: TNETD7100, 7200 and 7300. 107 108config ATH25 109 bool "Atheros AR231x/AR531x SoC support" --- 7 unchanged lines hidden (view full) --- 117 select SYS_SUPPORTS_32BIT_KERNEL 118 select SYS_HAS_EARLY_PRINTK 119 help 120 Support for Atheros AR231x and Atheros AR531x based boards 121 122config ATH79 123 bool "Atheros AR71XX/AR724X/AR913X based boards" 124 select ARCH_HAS_RESET_CONTROLLER |
| 125 select ARCH_REQUIRE_GPIOLIB | |
| 126 select BOOT_RAW 127 select CEVT_R4K 128 select CSRC_R4K 129 select DMA_NONCOHERENT | 125 select BOOT_RAW 126 select CEVT_R4K 127 select CSRC_R4K 128 select DMA_NONCOHERENT |
| 129 select GPIOLIB |
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| 130 select HAVE_CLK 131 select COMMON_CLK 132 select CLKDEV_LOOKUP 133 select IRQ_MIPS_CPU 134 select MIPS_MACHINE 135 select SYS_HAS_CPU_MIPS32_R2 136 select SYS_HAS_EARLY_PRINTK 137 select SYS_SUPPORTS_32BIT_KERNEL --- 27 unchanged lines hidden (view full) --- 165 select SYS_HAS_CPU_BMIPS4350 166 select SYS_HAS_CPU_BMIPS4380 167 select SYS_HAS_CPU_BMIPS5000 168 select SWAP_IO_SPACE 169 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 170 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 171 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 172 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN | 130 select HAVE_CLK 131 select COMMON_CLK 132 select CLKDEV_LOOKUP 133 select IRQ_MIPS_CPU 134 select MIPS_MACHINE 135 select SYS_HAS_CPU_MIPS32_R2 136 select SYS_HAS_EARLY_PRINTK 137 select SYS_SUPPORTS_32BIT_KERNEL --- 27 unchanged lines hidden (view full) --- 165 select SYS_HAS_CPU_BMIPS4350 166 select SYS_HAS_CPU_BMIPS4380 167 select SYS_HAS_CPU_BMIPS5000 168 select SWAP_IO_SPACE 169 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 170 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 171 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 172 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 173 select ARCH_WANT_OPTIONAL_GPIOLIB | |
| 174 help 175 Build a generic DT-based kernel image that boots on select 176 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 177 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 178 must be set appropriately for your board. 179 180config BCM47XX 181 bool "Broadcom BCM47XX based boards" | 173 help 174 Build a generic DT-based kernel image that boots on select 175 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 176 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 177 must be set appropriately for your board. 178 179config BCM47XX 180 bool "Broadcom BCM47XX based boards" |
| 182 select ARCH_WANT_OPTIONAL_GPIOLIB | |
| 183 select BOOT_RAW 184 select CEVT_R4K 185 select CSRC_R4K 186 select DMA_NONCOHERENT 187 select HW_HAS_PCI 188 select IRQ_MIPS_CPU 189 select SYS_HAS_CPU_MIPS32_R1 190 select NO_EXCEPT_FILL --- 15 unchanged lines hidden (view full) --- 206 select CSRC_R4K 207 select SYNC_R4K 208 select DMA_NONCOHERENT 209 select IRQ_MIPS_CPU 210 select SYS_SUPPORTS_32BIT_KERNEL 211 select SYS_SUPPORTS_BIG_ENDIAN 212 select SYS_HAS_EARLY_PRINTK 213 select SWAP_IO_SPACE | 181 select BOOT_RAW 182 select CEVT_R4K 183 select CSRC_R4K 184 select DMA_NONCOHERENT 185 select HW_HAS_PCI 186 select IRQ_MIPS_CPU 187 select SYS_HAS_CPU_MIPS32_R1 188 select NO_EXCEPT_FILL --- 15 unchanged lines hidden (view full) --- 204 select CSRC_R4K 205 select SYNC_R4K 206 select DMA_NONCOHERENT 207 select IRQ_MIPS_CPU 208 select SYS_SUPPORTS_32BIT_KERNEL 209 select SYS_SUPPORTS_BIG_ENDIAN 210 select SYS_HAS_EARLY_PRINTK 211 select SWAP_IO_SPACE |
| 214 select ARCH_REQUIRE_GPIOLIB | 212 select GPIOLIB |
| 215 select HAVE_CLK 216 select MIPS_L1_CACHE_SHIFT_4 217 help 218 Support for BCM63XX based boards 219 220config MIPS_COBALT 221 bool "Cobalt Server" 222 select CEVT_R4K --- 77 unchanged lines hidden (view full) --- 300 301config MACH_INGENIC 302 bool "Ingenic SoC based machines" 303 select SYS_SUPPORTS_32BIT_KERNEL 304 select SYS_SUPPORTS_LITTLE_ENDIAN 305 select SYS_SUPPORTS_ZBOOT_UART16550 306 select DMA_NONCOHERENT 307 select IRQ_MIPS_CPU | 213 select HAVE_CLK 214 select MIPS_L1_CACHE_SHIFT_4 215 help 216 Support for BCM63XX based boards 217 218config MIPS_COBALT 219 bool "Cobalt Server" 220 select CEVT_R4K --- 77 unchanged lines hidden (view full) --- 298 299config MACH_INGENIC 300 bool "Ingenic SoC based machines" 301 select SYS_SUPPORTS_32BIT_KERNEL 302 select SYS_SUPPORTS_LITTLE_ENDIAN 303 select SYS_SUPPORTS_ZBOOT_UART16550 304 select DMA_NONCOHERENT 305 select IRQ_MIPS_CPU |
| 308 select ARCH_REQUIRE_GPIOLIB | 306 select GPIOLIB |
| 309 select COMMON_CLK 310 select GENERIC_IRQ_CHIP 311 select BUILTIN_DTB 312 select USE_OF 313 select LIBFDT 314 315config LANTIQ 316 bool "Lantiq based platforms" 317 select DMA_NONCOHERENT 318 select IRQ_MIPS_CPU 319 select CEVT_R4K 320 select CSRC_R4K 321 select SYS_HAS_CPU_MIPS32_R1 322 select SYS_HAS_CPU_MIPS32_R2 323 select SYS_SUPPORTS_BIG_ENDIAN 324 select SYS_SUPPORTS_32BIT_KERNEL 325 select SYS_SUPPORTS_MIPS16 326 select SYS_SUPPORTS_MULTITHREADING 327 select SYS_HAS_EARLY_PRINTK | 307 select COMMON_CLK 308 select GENERIC_IRQ_CHIP 309 select BUILTIN_DTB 310 select USE_OF 311 select LIBFDT 312 313config LANTIQ 314 bool "Lantiq based platforms" 315 select DMA_NONCOHERENT 316 select IRQ_MIPS_CPU 317 select CEVT_R4K 318 select CSRC_R4K 319 select SYS_HAS_CPU_MIPS32_R1 320 select SYS_HAS_CPU_MIPS32_R2 321 select SYS_SUPPORTS_BIG_ENDIAN 322 select SYS_SUPPORTS_32BIT_KERNEL 323 select SYS_SUPPORTS_MIPS16 324 select SYS_SUPPORTS_MULTITHREADING 325 select SYS_HAS_EARLY_PRINTK |
| 328 select ARCH_REQUIRE_GPIOLIB | 326 select GPIOLIB |
| 329 select SWAP_IO_SPACE 330 select BOOT_RAW 331 select CLKDEV_LOOKUP 332 select USE_OF 333 select PINCTRL 334 select PINCTRL_LANTIQ 335 select ARCH_HAS_RESET_CONTROLLER 336 select RESET_CONTROLLER --- 35 unchanged lines hidden (view full) --- 372 family of multi-core CPUs. They are both 64-bit general-purpose 373 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 374 of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 375 in the People's Republic of China. The chief architect is Professor 376 Weiwu Hu. 377 378config MACH_PISTACHIO 379 bool "IMG Pistachio SoC based boards" | 327 select SWAP_IO_SPACE 328 select BOOT_RAW 329 select CLKDEV_LOOKUP 330 select USE_OF 331 select PINCTRL 332 select PINCTRL_LANTIQ 333 select ARCH_HAS_RESET_CONTROLLER 334 select RESET_CONTROLLER --- 35 unchanged lines hidden (view full) --- 370 family of multi-core CPUs. They are both 64-bit general-purpose 371 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 372 of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 373 in the People's Republic of China. The chief architect is Professor 374 Weiwu Hu. 375 376config MACH_PISTACHIO 377 bool "IMG Pistachio SoC based boards" |
| 380 select ARCH_REQUIRE_GPIOLIB | |
| 381 select BOOT_ELF32 382 select BOOT_RAW 383 select CEVT_R4K 384 select CLKSRC_MIPS_GIC 385 select COMMON_CLK 386 select CSRC_R4K 387 select DMA_MAYBE_COHERENT | 378 select BOOT_ELF32 379 select BOOT_RAW 380 select CEVT_R4K 381 select CLKSRC_MIPS_GIC 382 select COMMON_CLK 383 select CSRC_R4K 384 select DMA_MAYBE_COHERENT |
| 385 select GPIOLIB |
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| 388 select IRQ_MIPS_CPU 389 select LIBFDT 390 select MFD_SYSCON 391 select MIPS_CPU_SCACHE 392 select MIPS_GIC 393 select PINCTRL 394 select REGULATOR 395 select SYS_HAS_CPU_MIPS32_R2 --- 5 unchanged lines hidden (view full) --- 401 select SYS_HAS_EARLY_PRINTK 402 select USE_GENERIC_EARLY_PRINTK_8250 403 select USE_OF 404 help 405 This enables support for the IMG Pistachio SoC platform. 406 407config MACH_XILFPGA 408 bool "MIPSfpga Xilinx based boards" | 386 select IRQ_MIPS_CPU 387 select LIBFDT 388 select MFD_SYSCON 389 select MIPS_CPU_SCACHE 390 select MIPS_GIC 391 select PINCTRL 392 select REGULATOR 393 select SYS_HAS_CPU_MIPS32_R2 --- 5 unchanged lines hidden (view full) --- 399 select SYS_HAS_EARLY_PRINTK 400 select USE_GENERIC_EARLY_PRINTK_8250 401 select USE_OF 402 help 403 This enables support for the IMG Pistachio SoC platform. 404 405config MACH_XILFPGA 406 bool "MIPSfpga Xilinx based boards" |
| 409 select ARCH_REQUIRE_GPIOLIB | |
| 410 select BOOT_ELF32 411 select BOOT_RAW 412 select BUILTIN_DTB 413 select CEVT_R4K 414 select COMMON_CLK 415 select CSRC_R4K | 407 select BOOT_ELF32 408 select BOOT_RAW 409 select BUILTIN_DTB 410 select CEVT_R4K 411 select COMMON_CLK 412 select CSRC_R4K |
| 413 select GPIOLIB |
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| 416 select IRQ_MIPS_CPU 417 select LIBFDT 418 select MIPS_CPU_SCACHE 419 select SYS_HAS_EARLY_PRINTK 420 select SYS_HAS_CPU_MIPS32_R2 421 select SYS_SUPPORTS_32BIT_KERNEL 422 select SYS_SUPPORTS_LITTLE_ENDIAN 423 select SYS_SUPPORTS_ZBOOT_UART16550 --- 107 unchanged lines hidden (view full) --- 531 This enables support for the NEC Electronics Mark-eins boards. 532 533config MACH_VR41XX 534 bool "NEC VR4100 series based machines" 535 select CEVT_R4K 536 select CSRC_R4K 537 select SYS_HAS_CPU_VR41XX 538 select SYS_SUPPORTS_MIPS16 | 414 select IRQ_MIPS_CPU 415 select LIBFDT 416 select MIPS_CPU_SCACHE 417 select SYS_HAS_EARLY_PRINTK 418 select SYS_HAS_CPU_MIPS32_R2 419 select SYS_SUPPORTS_32BIT_KERNEL 420 select SYS_SUPPORTS_LITTLE_ENDIAN 421 select SYS_SUPPORTS_ZBOOT_UART16550 --- 107 unchanged lines hidden (view full) --- 529 This enables support for the NEC Electronics Mark-eins boards. 530 531config MACH_VR41XX 532 bool "NEC VR4100 series based machines" 533 select CEVT_R4K 534 select CSRC_R4K 535 select SYS_HAS_CPU_VR41XX 536 select SYS_SUPPORTS_MIPS16 |
| 539 select ARCH_REQUIRE_GPIOLIB | 537 select GPIOLIB |
| 540 541config NXP_STB220 542 bool "NXP STB220 board" 543 select SOC_PNX833X 544 help 545 Support for NXP Semiconductors STB220 Development Board. 546 547config NXP_STB225 --- 303 unchanged lines hidden (view full) --- 851 select DMA_NONCOHERENT 852 select HW_HAS_PCI 853 select IRQ_MIPS_CPU 854 select SYS_HAS_CPU_MIPS32_R1 855 select SYS_SUPPORTS_32BIT_KERNEL 856 select SYS_SUPPORTS_LITTLE_ENDIAN 857 select SWAP_IO_SPACE 858 select BOOT_RAW | 538 539config NXP_STB220 540 bool "NXP STB220 board" 541 select SOC_PNX833X 542 help 543 Support for NXP Semiconductors STB220 Development Board. 544 545config NXP_STB225 --- 303 unchanged lines hidden (view full) --- 849 select DMA_NONCOHERENT 850 select HW_HAS_PCI 851 select IRQ_MIPS_CPU 852 select SYS_HAS_CPU_MIPS32_R1 853 select SYS_SUPPORTS_32BIT_KERNEL 854 select SYS_SUPPORTS_LITTLE_ENDIAN 855 select SWAP_IO_SPACE 856 select BOOT_RAW |
| 859 select ARCH_REQUIRE_GPIOLIB | 857 select GPIOLIB |
| 860 select MIPS_L1_CACHE_SHIFT_4 861 help 862 Support the Mikrotik(tm) RouterBoard 532 series, 863 based on the IDT RC32434 SoC. 864 865config CAVIUM_OCTEON_SOC 866 bool "Cavium Networks Octeon SoC based boards" 867 select CEVT_R4K --- 6 unchanged lines hidden (view full) --- 874 select SYS_SUPPORTS_LITTLE_ENDIAN 875 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 876 select SYS_HAS_EARLY_PRINTK 877 select SYS_HAS_CPU_CAVIUM_OCTEON 878 select SWAP_IO_SPACE 879 select HW_HAS_PCI 880 select ZONE_DMA32 881 select HOLES_IN_ZONE | 858 select MIPS_L1_CACHE_SHIFT_4 859 help 860 Support the Mikrotik(tm) RouterBoard 532 series, 861 based on the IDT RC32434 SoC. 862 863config CAVIUM_OCTEON_SOC 864 bool "Cavium Networks Octeon SoC based boards" 865 select CEVT_R4K --- 6 unchanged lines hidden (view full) --- 872 select SYS_SUPPORTS_LITTLE_ENDIAN 873 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 874 select SYS_HAS_EARLY_PRINTK 875 select SYS_HAS_CPU_CAVIUM_OCTEON 876 select SWAP_IO_SPACE 877 select HW_HAS_PCI 878 select ZONE_DMA32 879 select HOLES_IN_ZONE |
| 882 select ARCH_REQUIRE_GPIOLIB | 880 select GPIOLIB |
| 883 select LIBFDT 884 select USE_OF 885 select ARCH_SPARSEMEM_ENABLE 886 select SYS_SUPPORTS_SMP 887 select NR_CPUS_DEFAULT_16 888 select BUILTIN_DTB 889 select MTD_COMPLEX_MAPPINGS 890 help --- 41 unchanged lines hidden (view full) --- 932 select BOOT_ELF32 933 select NLM_COMMON 934 select SYS_HAS_CPU_XLP 935 select SYS_SUPPORTS_SMP 936 select HW_HAS_PCI 937 select SYS_SUPPORTS_32BIT_KERNEL 938 select SYS_SUPPORTS_64BIT_KERNEL 939 select ARCH_PHYS_ADDR_T_64BIT | 881 select LIBFDT 882 select USE_OF 883 select ARCH_SPARSEMEM_ENABLE 884 select SYS_SUPPORTS_SMP 885 select NR_CPUS_DEFAULT_16 886 select BUILTIN_DTB 887 select MTD_COMPLEX_MAPPINGS 888 help --- 41 unchanged lines hidden (view full) --- 930 select BOOT_ELF32 931 select NLM_COMMON 932 select SYS_HAS_CPU_XLP 933 select SYS_SUPPORTS_SMP 934 select HW_HAS_PCI 935 select SYS_SUPPORTS_32BIT_KERNEL 936 select SYS_SUPPORTS_64BIT_KERNEL 937 select ARCH_PHYS_ADDR_T_64BIT |
| 940 select ARCH_REQUIRE_GPIOLIB | 938 select GPIOLIB |
| 941 select SYS_SUPPORTS_BIG_ENDIAN 942 select SYS_SUPPORTS_LITTLE_ENDIAN 943 select SYS_SUPPORTS_HIGHMEM 944 select DMA_COHERENT 945 select NR_CPUS_DEFAULT_32 946 select CEVT_R4K 947 select CSRC_R4K 948 select IRQ_MIPS_CPU --- 123 unchanged lines hidden (view full) --- 1072 1073config CSRC_SB1250 1074 bool 1075 1076config MIPS_CLOCK_VSYSCALL 1077 def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1078 1079config GPIO_TXX9 | 939 select SYS_SUPPORTS_BIG_ENDIAN 940 select SYS_SUPPORTS_LITTLE_ENDIAN 941 select SYS_SUPPORTS_HIGHMEM 942 select DMA_COHERENT 943 select NR_CPUS_DEFAULT_32 944 select CEVT_R4K 945 select CSRC_R4K 946 select IRQ_MIPS_CPU --- 123 unchanged lines hidden (view full) --- 1070 1071config CSRC_SB1250 1072 bool 1073 1074config MIPS_CLOCK_VSYSCALL 1075 def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1076 1077config GPIO_TXX9 |
| 1080 select ARCH_REQUIRE_GPIOLIB | 1078 select GPIOLIB |
| 1081 bool 1082 1083config FW_CFE 1084 bool 1085 1086config ARCH_DMA_ADDR_T_64BIT 1087 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 1088 --- 248 unchanged lines hidden (view full) --- 1337config CPU_LOONGSON3 1338 bool "Loongson 3 CPU" 1339 depends on SYS_HAS_CPU_LOONGSON3 1340 select CPU_SUPPORTS_64BIT_KERNEL 1341 select CPU_SUPPORTS_HIGHMEM 1342 select CPU_SUPPORTS_HUGEPAGES 1343 select WEAK_ORDERING 1344 select WEAK_REORDERING_BEYOND_LLSC | 1079 bool 1080 1081config FW_CFE 1082 bool 1083 1084config ARCH_DMA_ADDR_T_64BIT 1085 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 1086 --- 248 unchanged lines hidden (view full) --- 1335config CPU_LOONGSON3 1336 bool "Loongson 3 CPU" 1337 depends on SYS_HAS_CPU_LOONGSON3 1338 select CPU_SUPPORTS_64BIT_KERNEL 1339 select CPU_SUPPORTS_HIGHMEM 1340 select CPU_SUPPORTS_HUGEPAGES 1341 select WEAK_ORDERING 1342 select WEAK_REORDERING_BEYOND_LLSC |
| 1345 select ARCH_REQUIRE_GPIOLIB | 1343 select GPIOLIB |
| 1346 help 1347 The Loongson 3 processor implements the MIPS64R2 instruction 1348 set with many extensions. 1349 1350config CPU_LOONGSON2E 1351 bool "Loongson 2E" 1352 depends on SYS_HAS_CPU_LOONGSON2E 1353 select CPU_LOONGSON2 1354 help 1355 The Loongson 2E processor implements the MIPS III instruction set 1356 with many extensions. 1357 1358 It has an internal FPGA northbridge, which is compatible to 1359 bonito64. 1360 1361config CPU_LOONGSON2F 1362 bool "Loongson 2F" 1363 depends on SYS_HAS_CPU_LOONGSON2F 1364 select CPU_LOONGSON2 | 1344 help 1345 The Loongson 3 processor implements the MIPS64R2 instruction 1346 set with many extensions. 1347 1348config CPU_LOONGSON2E 1349 bool "Loongson 2E" 1350 depends on SYS_HAS_CPU_LOONGSON2E 1351 select CPU_LOONGSON2 1352 help 1353 The Loongson 2E processor implements the MIPS III instruction set 1354 with many extensions. 1355 1356 It has an internal FPGA northbridge, which is compatible to 1357 bonito64. 1358 1359config CPU_LOONGSON2F 1360 bool "Loongson 2F" 1361 depends on SYS_HAS_CPU_LOONGSON2F 1362 select CPU_LOONGSON2 |
| 1365 select ARCH_REQUIRE_GPIOLIB | 1363 select GPIOLIB |
| 1366 help 1367 The Loongson 2F processor implements the MIPS III instruction set 1368 with many extensions. 1369 1370 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 1371 have a similar programming interface with FPGA northbridge used in 1372 Loongson2E. 1373 --- 1663 unchanged lines hidden --- | 1364 help 1365 The Loongson 2F processor implements the MIPS III instruction set 1366 with many extensions. 1367 1368 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 1369 have a similar programming interface with FPGA northbridge used in 1370 Loongson2E. 1371 --- 1663 unchanged lines hidden --- |