| Kconfig (419e2f1838819e954071dfa1d1f820ab3386ada1) | Kconfig (db91427b6502e8e46db4b616e4eaa9b9cf4e6363) |
|---|---|
| 1# SPDX-License-Identifier: GPL-2.0 2config MIPS 3 bool 4 default y 5 select ARCH_32BIT_OFF_T if !64BIT 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT 7 select ARCH_CLOCKSOURCE_DATA 8 select ARCH_HAS_ELF_RANDOMIZE --- 1105 unchanged lines hidden (view full) --- 1114 1115config DMA_PERDEV_COHERENT 1116 bool 1117 select ARCH_HAS_SETUP_DMA_OPS 1118 select DMA_NONCOHERENT 1119 1120config DMA_NONCOHERENT 1121 bool | 1# SPDX-License-Identifier: GPL-2.0 2config MIPS 3 bool 4 default y 5 select ARCH_32BIT_OFF_T if !64BIT 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT 7 select ARCH_CLOCKSOURCE_DATA 8 select ARCH_HAS_ELF_RANDOMIZE --- 1105 unchanged lines hidden (view full) --- 1114 1115config DMA_PERDEV_COHERENT 1116 bool 1117 select ARCH_HAS_SETUP_DMA_OPS 1118 select DMA_NONCOHERENT 1119 1120config DMA_NONCOHERENT 1121 bool |
| 1122 # 1123 # MIPS allows mixing "slightly different" Cacheability and Coherency 1124 # Attribute bits. It is believed that the uncached access through 1125 # KSEG1 and the implementation specific "uncached accelerated" used 1126 # by pgprot_writcombine can be mixed, and the latter sometimes provides 1127 # significant advantages. 1128 # |
|
| 1122 select ARCH_HAS_DMA_WRITE_COMBINE 1123 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1124 select ARCH_HAS_UNCACHED_SEGMENT 1125 select NEED_DMA_MAP_STATE 1126 select ARCH_HAS_DMA_COHERENT_TO_PFN 1127 select DMA_NONCOHERENT_CACHE_SYNC 1128 1129config SYS_HAS_EARLY_PRINTK --- 2095 unchanged lines hidden --- | 1129 select ARCH_HAS_DMA_WRITE_COMBINE 1130 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1131 select ARCH_HAS_UNCACHED_SEGMENT 1132 select NEED_DMA_MAP_STATE 1133 select ARCH_HAS_DMA_COHERENT_TO_PFN 1134 select DMA_NONCOHERENT_CACHE_SYNC 1135 1136config SYS_HAS_EARLY_PRINTK --- 2095 unchanged lines hidden --- |