process.c (58c644ba512cfbc2e39b758dd979edd1d6d00e27) process.c (05cdf457477d6603b207d91873f0a3d4c7f8c1cd)
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.

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64 * the registers. That's OK for a brand new thread.*/
65 memset(childregs, 0, sizeof(struct pt_regs));
66 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
67 ti->cpu_context.r1 = (unsigned long)childregs;
68 ti->cpu_context.r20 = (unsigned long)usp; /* fn */
69 ti->cpu_context.r19 = (unsigned long)arg;
70 childregs->pt_mode = 1;
71 local_save_flags(childregs->msr);
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.

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64 * the registers. That's OK for a brand new thread.*/
65 memset(childregs, 0, sizeof(struct pt_regs));
66 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
67 ti->cpu_context.r1 = (unsigned long)childregs;
68 ti->cpu_context.r20 = (unsigned long)usp; /* fn */
69 ti->cpu_context.r19 = (unsigned long)arg;
70 childregs->pt_mode = 1;
71 local_save_flags(childregs->msr);
72#ifdef CONFIG_MMU
73 ti->cpu_context.msr = childregs->msr & ~MSR_IE;
72 ti->cpu_context.msr = childregs->msr & ~MSR_IE;
74#endif
75 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
76 return 0;
77 }
78 *childregs = *current_pt_regs();
79 if (usp)
80 childregs->r1 = usp;
81
82 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
83 ti->cpu_context.r1 = (unsigned long)childregs;
73 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
74 return 0;
75 }
76 *childregs = *current_pt_regs();
77 if (usp)
78 childregs->r1 = usp;
79
80 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
81 ti->cpu_context.r1 = (unsigned long)childregs;
84#ifndef CONFIG_MMU
85 ti->cpu_context.msr = (unsigned long)childregs->msr;
86#else
87 childregs->msr |= MSR_UMS;
88
89 /* we should consider the fact that childregs is a copy of the parent
90 * regs which were saved immediately after entering the kernel state
91 * before enabling VM. This MSR will be restored in switch_to and
92 * RETURN() and we want to have the right machine state there
93 * specifically this state must have INTs disabled before and enabled
94 * after performing rtbd

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100 childregs->msr |= MSR_IE;
101 childregs->msr &= ~MSR_VM;
102 childregs->msr |= MSR_VMS;
103 childregs->msr |= MSR_EE; /* exceptions will be enabled*/
104
105 ti->cpu_context.msr = (childregs->msr|MSR_VM);
106 ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
107 ti->cpu_context.msr &= ~MSR_IE;
82 childregs->msr |= MSR_UMS;
83
84 /* we should consider the fact that childregs is a copy of the parent
85 * regs which were saved immediately after entering the kernel state
86 * before enabling VM. This MSR will be restored in switch_to and
87 * RETURN() and we want to have the right machine state there
88 * specifically this state must have INTs disabled before and enabled
89 * after performing rtbd

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95 childregs->msr |= MSR_IE;
96 childregs->msr &= ~MSR_VM;
97 childregs->msr |= MSR_VMS;
98 childregs->msr |= MSR_EE; /* exceptions will be enabled*/
99
100 ti->cpu_context.msr = (childregs->msr|MSR_VM);
101 ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
102 ti->cpu_context.msr &= ~MSR_IE;
108#endif
109 ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
110
111 /*
112 * r21 is the thread reg, r10 is 6th arg to clone
113 * which contains TLS area
114 */
115 if (clone_flags & CLONE_SETTLS)
116 childregs->r21 = tls;

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125}
126
127/* Set up a thread for executing a new program */
128void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
129{
130 regs->pc = pc;
131 regs->r1 = usp;
132 regs->pt_mode = 0;
103 ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
104
105 /*
106 * r21 is the thread reg, r10 is 6th arg to clone
107 * which contains TLS area
108 */
109 if (clone_flags & CLONE_SETTLS)
110 childregs->r21 = tls;

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119}
120
121/* Set up a thread for executing a new program */
122void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
123{
124 regs->pc = pc;
125 regs->r1 = usp;
126 regs->pt_mode = 0;
133#ifdef CONFIG_MMU
134 regs->msr |= MSR_UMS;
135 regs->msr &= ~MSR_VM;
127 regs->msr |= MSR_UMS;
128 regs->msr &= ~MSR_VM;
136#endif
137}
138
129}
130
139#ifdef CONFIG_MMU
140#include <linux/elfcore.h>
141/*
142 * Set up a thread for executing a new program
143 */
144int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
145{
146 return 0; /* MicroBlaze has no separate FPU registers */
147}
131#include <linux/elfcore.h>
132/*
133 * Set up a thread for executing a new program
134 */
135int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
136{
137 return 0; /* MicroBlaze has no separate FPU registers */
138}
148#endif /* CONFIG_MMU */
149
150void arch_cpu_idle(void)
151{
139
140void arch_cpu_idle(void)
141{
152 raw_local_irq_enable();
142 local_irq_enable();
153}
143}