mmu.h (ead5d1f4d877e92c051e1a1ade623d0d30e71619) mmu.h (05cdf457477d6603b207d91873f0a3d4c7f8c1cd)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
4 * Copyright (C) 2008-2009 PetaLogix
5 * Copyright (C) 2006 Atmark Techno, Inc.
6 */
7
8#ifndef _ASM_MICROBLAZE_MMU_H
9#define _ASM_MICROBLAZE_MMU_H
10
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
4 * Copyright (C) 2008-2009 PetaLogix
5 * Copyright (C) 2006 Atmark Techno, Inc.
6 */
7
8#ifndef _ASM_MICROBLAZE_MMU_H
9#define _ASM_MICROBLAZE_MMU_H
10
11# ifndef CONFIG_MMU
12# include <asm-generic/mmu.h>
13# else /* CONFIG_MMU */
14# ifdef __KERNEL__
15# ifndef __ASSEMBLY__
16
17/* Default "unsigned long" context */
18typedef unsigned long mm_context_t;
19
20/* Hardware Page Table Entry */
21typedef struct _PTE {

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114# define TLB_ZSEL(x) (((x) & 0xF) << 4)
115# define TLB_ATTR_MASK 0x0000000F
116# define TLB_W 0x00000008 /* Caching is write-through */
117# define TLB_I 0x00000004 /* Caching is inhibited */
118# define TLB_M 0x00000002 /* Memory is coherent */
119# define TLB_G 0x00000001 /* Memory is guarded from prefetch */
120
121# endif /* __KERNEL__ */
11# ifdef __KERNEL__
12# ifndef __ASSEMBLY__
13
14/* Default "unsigned long" context */
15typedef unsigned long mm_context_t;
16
17/* Hardware Page Table Entry */
18typedef struct _PTE {

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111# define TLB_ZSEL(x) (((x) & 0xF) << 4)
112# define TLB_ATTR_MASK 0x0000000F
113# define TLB_W 0x00000008 /* Caching is write-through */
114# define TLB_I 0x00000004 /* Caching is inhibited */
115# define TLB_M 0x00000002 /* Memory is coherent */
116# define TLB_G 0x00000001 /* Memory is guarded from prefetch */
117
118# endif /* __KERNEL__ */
122# endif /* CONFIG_MMU */
123#endif /* _ASM_MICROBLAZE_MMU_H */
119#endif /* _ASM_MICROBLAZE_MMU_H */