m520xsim.h (b74b953b998bcc2db91b694446f3a2619ec32de6) m520xsim.h (7fc82b655a169039d8a58fde609b5e778573d5ab)
1/****************************************************************************/
2
3/*
4 * m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
5 *
6 * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
7 */
8
9/****************************************************************************/
10#ifndef m520xsim_h
11#define m520xsim_h
12/****************************************************************************/
13
1/****************************************************************************/
2
3/*
4 * m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
5 *
6 * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
7 */
8
9/****************************************************************************/
10#ifndef m520xsim_h
11#define m520xsim_h
12/****************************************************************************/
13
14#define CPU_NAME "COLDFIRE(m520x)"
15
14/*
15 * Define the 520x SIM register set addresses.
16 */
17#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */
18#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
19#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
20#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
21#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */

--- 117 unchanged lines hidden --- 		16/*
17 * Define the 520x SIM register set addresses.
18 */
19#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */
20#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
21#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
22#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
23#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */

--- 117 unchanged lines hidden ---