| fpsp.S (97eb3f24352ec6632c2127b35d8087d2a809a9b9) | fpsp.S (25985edcedea6396277003854657b5f3cb31a628) |
|---|---|
| 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 3M68000 Hi-Performance Microprocessor Division 4M68060 Software Package 5Production Release P1.00 -- October 10, 1994 6 7M68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 8 --- 11799 unchanged lines hidden (view full) --- 11808fmul_unfl_ena: 11809 fmovm.x FP_SCR1(%a6),&0x40 # load dst op 11810 11811 mov.l L_SCR3(%a6),%d1 11812 andi.b &0xc0,%d1 # is precision extended? 11813 bne.b fmul_unfl_ena_sd # no, sgl or dbl 11814 11815# if the rnd mode is anything but RZ, then we have to re-do the above | 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 3M68000 Hi-Performance Microprocessor Division 4M68060 Software Package 5Production Release P1.00 -- October 10, 1994 6 7M68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 8 --- 11799 unchanged lines hidden (view full) --- 11808fmul_unfl_ena: 11809 fmovm.x FP_SCR1(%a6),&0x40 # load dst op 11810 11811 mov.l L_SCR3(%a6),%d1 11812 andi.b &0xc0,%d1 # is precision extended? 11813 bne.b fmul_unfl_ena_sd # no, sgl or dbl 11814 11815# if the rnd mode is anything but RZ, then we have to re-do the above |
| 11816# multiplication becuase we used RZ for all. | 11816# multiplication because we used RZ for all. |
| 11817 fmov.l L_SCR3(%a6),%fpcr # set FPCR 11818 11819fmul_unfl_ena_cont: 11820 fmov.l &0x0,%fpsr # clear FPSR 11821 11822 fmul.x FP_SCR0(%a6),%fp1 # execute multiply 11823 11824 fmov.l &0x0,%fpcr # clear FPCR --- 6265 unchanged lines hidden (view full) --- 18090 mov.l EXC_EA(%a6),%a0 # fetch <ea> 18091 bsr.l _dmem_write_byte # write result byte 18092 18093 tst.l %d1 # did dstore fail? 18094 bne.w fscc_err # yes 18095 18096 rts 18097 | 11817 fmov.l L_SCR3(%a6),%fpcr # set FPCR 11818 11819fmul_unfl_ena_cont: 11820 fmov.l &0x0,%fpsr # clear FPSR 11821 11822 fmul.x FP_SCR0(%a6),%fp1 # execute multiply 11823 11824 fmov.l &0x0,%fpcr # clear FPCR --- 6265 unchanged lines hidden (view full) --- 18090 mov.l EXC_EA(%a6),%a0 # fetch <ea> 18091 bsr.l _dmem_write_byte # write result byte 18092 18093 tst.l %d1 # did dstore fail? 18094 bne.w fscc_err # yes 18095 18096 rts 18097 |
| 18098# addresing mode is post-increment. write the result byte. if the write | 18098# addressing mode is post-increment. write the result byte. if the write |
| 18099# fails then don't update the address register. if write passes then 18100# call inc_areg() to update the address register. 18101fscc_mem_inc: 18102 mov.l %a0,%d0 # pass result in d0 18103 mov.l EXC_EA(%a6),%a0 # fetch <ea> 18104 bsr.l _dmem_write_byte # write result byte 18105 18106 tst.l %d1 # did dstore fail? --- 2764 unchanged lines hidden (view full) --- 20871 addi.w &DBL_BIAS,%d0 # add double precision bias 20872 tst.b FTEMP_HI(%a0) # is number a denorm? 20873 bmi.b dst_get_dupper # no 20874 subq.w &0x1,%d0 # yes; denorm bias = DBL_BIAS - 1 20875dst_get_dupper: 20876 swap %d0 # d0 now in upper word 20877 lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp 20878 tst.b FTEMP_EX(%a0) # test sign | 18099# fails then don't update the address register. if write passes then 18100# call inc_areg() to update the address register. 18101fscc_mem_inc: 18102 mov.l %a0,%d0 # pass result in d0 18103 mov.l EXC_EA(%a6),%a0 # fetch <ea> 18104 bsr.l _dmem_write_byte # write result byte 18105 18106 tst.l %d1 # did dstore fail? --- 2764 unchanged lines hidden (view full) --- 20871 addi.w &DBL_BIAS,%d0 # add double precision bias 20872 tst.b FTEMP_HI(%a0) # is number a denorm? 20873 bmi.b dst_get_dupper # no 20874 subq.w &0x1,%d0 # yes; denorm bias = DBL_BIAS - 1 20875dst_get_dupper: 20876 swap %d0 # d0 now in upper word 20877 lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp 20878 tst.b FTEMP_EX(%a0) # test sign |
| 20879 bpl.b dst_get_dman # if postive, go process mantissa | 20879 bpl.b dst_get_dman # if positive, go process mantissa |
| 20880 bset &0x1f,%d0 # if negative, set sign 20881dst_get_dman: 20882 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa 20883 bfextu %d1{&1:&20},%d1 # get upper 20 bits of ms 20884 or.l %d1,%d0 # put these bits in ms word of double 20885 mov.l %d0,L_SCR1(%a6) # put the new exp back on the stack 20886 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa 20887 mov.l &21,%d0 # load shift count --- 2050 unchanged lines hidden (view full) --- 22938# INPUT *************************************************************** # 22939# None # 22940# # 22941# OUTPUT ************************************************************** # 22942# If no failure on _mem_read(): # 22943# FP_SRC(a6) = packed operand now as a binary FP number # 22944# # 22945# ALGORITHM *********************************************************** # | 20880 bset &0x1f,%d0 # if negative, set sign 20881dst_get_dman: 20882 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa 20883 bfextu %d1{&1:&20},%d1 # get upper 20 bits of ms 20884 or.l %d1,%d0 # put these bits in ms word of double 20885 mov.l %d0,L_SCR1(%a6) # put the new exp back on the stack 20886 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa 20887 mov.l &21,%d0 # load shift count --- 2050 unchanged lines hidden (view full) --- 22938# INPUT *************************************************************** # 22939# None # 22940# # 22941# OUTPUT ************************************************************** # 22942# If no failure on _mem_read(): # 22943# FP_SRC(a6) = packed operand now as a binary FP number # 22944# # 22945# ALGORITHM *********************************************************** # |
| 22946# Get the correct <ea> whihc is the value on the exception stack # | 22946# Get the correct <ea> which is the value on the exception stack # |
| 22947# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # 22948# Then, fetch the operand from memory. If the fetch fails, exit # 22949# through facc_in_x(). # 22950# If the packed operand is a ZERO,NAN, or INF, convert it to # 22951# its binary representation here. Else, call decbin() which will # 22952# convert the packed value to an extended precision binary value. # 22953# # 22954######################################################################### --- 1136 unchanged lines hidden (view full) --- 24091 mov.l L_SCR1(%a6),USER_FPCR(%a6) # restore user's FPCR 24092 24093# A13. Check for LEN digits. 24094# If the int operation results in more than LEN digits, 24095# or less than LEN -1 digits, adjust ILOG and repeat from 24096# A6. This test occurs only on the first pass. If the 24097# result is exactly 10^LEN, decrement ILOG and divide 24098# the mantissa by 10. The calculation of 10^LEN cannot | 22947# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # 22948# Then, fetch the operand from memory. If the fetch fails, exit # 22949# through facc_in_x(). # 22950# If the packed operand is a ZERO,NAN, or INF, convert it to # 22951# its binary representation here. Else, call decbin() which will # 22952# convert the packed value to an extended precision binary value. # 22953# # 22954######################################################################### --- 1136 unchanged lines hidden (view full) --- 24091 mov.l L_SCR1(%a6),USER_FPCR(%a6) # restore user's FPCR 24092 24093# A13. Check for LEN digits. 24094# If the int operation results in more than LEN digits, 24095# or less than LEN -1 digits, adjust ILOG and repeat from 24096# A6. This test occurs only on the first pass. If the 24097# result is exactly 10^LEN, decrement ILOG and divide 24098# the mantissa by 10. The calculation of 10^LEN cannot |
| 24099# be inexact, since all powers of ten upto 10^27 are exact | 24099# be inexact, since all powers of ten up to 10^27 are exact |
| 24100# in extended precision, so the use of a previous power-of-ten 24101# table will introduce no error. 24102# 24103# 24104# Register usage: 24105# Input/Output 24106# d0: FPCR with size set to ext/scratch final = 0 24107# d2: x/x --- 678 unchanged lines hidden --- | 24100# in extended precision, so the use of a previous power-of-ten 24101# table will introduce no error. 24102# 24103# 24104# Register usage: 24105# Input/Output 24106# d0: FPCR with size set to ext/scratch final = 0 24107# d2: x/x --- 678 unchanged lines hidden --- |