timers.c (ead5d1f4d877e92c051e1a1ade623d0d30e71619) timers.c (275e70e4b9dd4d59639e43fb859d0c953a374752)
1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 * timers.c -- generic ColdFire hardware timer support.
6 *
7 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
8 */

--- 34 unchanged lines hidden (view full) ---

43#else
44#define __raw_readtrr __raw_readw
45#define __raw_writetrr __raw_writew
46#endif
47
48static u32 mcftmr_cycles_per_jiffy;
49static u32 mcftmr_cnt;
50
1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 * timers.c -- generic ColdFire hardware timer support.
6 *
7 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
8 */

--- 34 unchanged lines hidden (view full) ---

43#else
44#define __raw_readtrr __raw_readw
45#define __raw_writetrr __raw_writew
46#endif
47
48static u32 mcftmr_cycles_per_jiffy;
49static u32 mcftmr_cnt;
50
51static irq_handler_t timer_interrupt;
52
53/***************************************************************************/
54
55static void init_timer_irq(void)
56{
57#ifdef MCFSIM_ICR_AUTOVEC
58 /* Timer1 is always used as system timer */
59 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
60 MCFSIM_TIMER1ICR);

--- 11 unchanged lines hidden (view full) ---

72/***************************************************************************/
73
74static irqreturn_t mcftmr_tick(int irq, void *dummy)
75{
76 /* Reset the ColdFire timer */
77 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
78
79 mcftmr_cnt += mcftmr_cycles_per_jiffy;
51/***************************************************************************/
52
53static void init_timer_irq(void)
54{
55#ifdef MCFSIM_ICR_AUTOVEC
56 /* Timer1 is always used as system timer */
57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
58 MCFSIM_TIMER1ICR);

--- 11 unchanged lines hidden (view full) ---

70/***************************************************************************/
71
72static irqreturn_t mcftmr_tick(int irq, void *dummy)
73{
74 /* Reset the ColdFire timer */
75 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
76
77 mcftmr_cnt += mcftmr_cycles_per_jiffy;
80 return timer_interrupt(irq, dummy);
78 legacy_timer_tick(1);
79 return IRQ_HANDLED;
81}
82
83/***************************************************************************/
84
85static u64 mcftmr_read_clk(struct clocksource *cs)
86{
87 unsigned long flags;
88 u32 cycles;

--- 32 unchanged lines hidden (view full) ---

121 * initialize TRR with n - 1.
122 */
123 __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
124 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
125 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
126
127 clocksource_register_hz(&mcftmr_clk, FREQ);
128
80}
81
82/***************************************************************************/
83
84static u64 mcftmr_read_clk(struct clocksource *cs)
85{
86 unsigned long flags;
87 u32 cycles;

--- 32 unchanged lines hidden (view full) ---

120 * initialize TRR with n - 1.
121 */
122 __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
123 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
124 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
125
126 clocksource_register_hz(&mcftmr_clk, FREQ);
127
129 timer_interrupt = handler;
130 init_timer_irq();
131 r = request_irq(MCF_IRQ_TIMER, mcftmr_tick, IRQF_TIMER, "timer", NULL);
132 if (r) {
133 pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
134 ERR_PTR(r));
135 }
136
137#ifdef CONFIG_HIGHPROFILE

--- 58 unchanged lines hidden --- 		128 init_timer_irq();
129 r = request_irq(MCF_IRQ_TIMER, mcftmr_tick, IRQF_TIMER, "timer", NULL);
130 if (r) {
131 pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
132 ERR_PTR(r));
133 }
134
135#ifdef CONFIG_HIGHPROFILE

--- 58 unchanged lines hidden ---