timers.c (275e70e4b9dd4d59639e43fb859d0c953a374752) timers.c (f9a015391e8908e68bd3147a8a5d8ac5f3ea2126)
1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 * timers.c -- generic ColdFire hardware timer support.
6 *
7 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
8 */

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102 .rating = 250,
103 .read = mcftmr_read_clk,
104 .mask = CLOCKSOURCE_MASK(32),
105 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
106};
107
108/***************************************************************************/
109
1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 * timers.c -- generic ColdFire hardware timer support.
6 *
7 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
8 */

--- 93 unchanged lines hidden (view full) ---

102 .rating = 250,
103 .read = mcftmr_read_clk,
104 .mask = CLOCKSOURCE_MASK(32),
105 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
106};
107
108/***************************************************************************/
109
110void hw_timer_init(irq_handler_t handler)
110void hw_timer_init(void)
111{
112 int r;
113
114 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
115 mcftmr_cycles_per_jiffy = FREQ / HZ;
116 /*
117 * The coldfire timer runs from 0 to TRR included, then 0
118 * again and so on. It counts thus actually TRR + 1 steps

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111{
112 int r;
113
114 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
115 mcftmr_cycles_per_jiffy = FREQ / HZ;
116 /*
117 * The coldfire timer runs from 0 to TRR included, then 0
118 * again and so on. It counts thus actually TRR + 1 steps

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