sltimers.c (ead5d1f4d877e92c051e1a1ade623d0d30e71619) | sltimers.c (275e70e4b9dd4d59639e43fb859d0c953a374752) |
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1// SPDX-License-Identifier: GPL-2.0 2/***************************************************************************/ 3 4/* 5 * sltimers.c -- generic ColdFire slice timer support. 6 * 7 * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be> 8 * based on --- 69 unchanged lines hidden (view full) --- 78/* 79 * By default use Slice Timer 0 as the system clock timer. 80 */ 81#define TA(a) (MCFSLT_TIMER0 + (a)) 82 83static u32 mcfslt_cycles_per_jiffy; 84static u32 mcfslt_cnt; 85 | 1// SPDX-License-Identifier: GPL-2.0 2/***************************************************************************/ 3 4/* 5 * sltimers.c -- generic ColdFire slice timer support. 6 * 7 * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be> 8 * based on --- 69 unchanged lines hidden (view full) --- 78/* 79 * By default use Slice Timer 0 as the system clock timer. 80 */ 81#define TA(a) (MCFSLT_TIMER0 + (a)) 82 83static u32 mcfslt_cycles_per_jiffy; 84static u32 mcfslt_cnt; 85 |
86static irq_handler_t timer_interrupt; 87 | |
88static irqreturn_t mcfslt_tick(int irq, void *dummy) 89{ 90 /* Reset Slice Timer 0 */ 91 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR)); 92 mcfslt_cnt += mcfslt_cycles_per_jiffy; | 86static irqreturn_t mcfslt_tick(int irq, void *dummy) 87{ 88 /* Reset Slice Timer 0 */ 89 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR)); 90 mcfslt_cnt += mcfslt_cycles_per_jiffy; |
93 return timer_interrupt(irq, dummy); | 91 legacy_timer_tick(1); 92 return IRQ_HANDLED; |
94} 95 96static u64 mcfslt_read_clk(struct clocksource *cs) 97{ 98 unsigned long flags; 99 u32 cycles, scnt; 100 101 local_irq_save(flags); --- 29 unchanged lines hidden (view full) --- 131 * n cycles, initialize STCNT with n - 1. 132 */ 133 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT)); 134 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN, 135 TA(MCFSLT_SCR)); 136 /* initialize mcfslt_cnt knowing that slice timers count down */ 137 mcfslt_cnt = mcfslt_cycles_per_jiffy; 138 | 93} 94 95static u64 mcfslt_read_clk(struct clocksource *cs) 96{ 97 unsigned long flags; 98 u32 cycles, scnt; 99 100 local_irq_save(flags); --- 29 unchanged lines hidden (view full) --- 130 * n cycles, initialize STCNT with n - 1. 131 */ 132 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT)); 133 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN, 134 TA(MCFSLT_SCR)); 135 /* initialize mcfslt_cnt knowing that slice timers count down */ 136 mcfslt_cnt = mcfslt_cycles_per_jiffy; 137 |
139 timer_interrupt = handler; | |
140 r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL); 141 if (r) { 142 pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER, 143 ERR_PTR(r)); 144 } 145 146 clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK); 147 148#ifdef CONFIG_HIGHPROFILE 149 mcfslt_profile_init(); 150#endif 151} | 138 r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL); 139 if (r) { 140 pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER, 141 ERR_PTR(r)); 142 } 143 144 clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK); 145 146#ifdef CONFIG_HIGHPROFILE 147 mcfslt_profile_init(); 148#endif 149} |