ptrace.c (34069d12e239ae8f36dd96c378e4622fb1c42a76) ptrace.c (bd3c5798484aa9a08302a844d7a75a2ee3b53d05)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Author: Hanlu Li <lihanlu@loongson.cn>
4 * Huacai Chen <chenhuacai@loongson.cn>
5 *
6 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
7 *
8 * Derived from MIPS:

--- 24 unchanged lines hidden (view full) ---

33#include <linux/seccomp.h>
34#include <linux/thread_info.h>
35#include <linux/uaccess.h>
36
37#include <asm/byteorder.h>
38#include <asm/cpu.h>
39#include <asm/cpu-info.h>
40#include <asm/fpu.h>
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Author: Hanlu Li <lihanlu@loongson.cn>
4 * Huacai Chen <chenhuacai@loongson.cn>
5 *
6 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
7 *
8 * Derived from MIPS:

--- 24 unchanged lines hidden (view full) ---

33#include <linux/seccomp.h>
34#include <linux/thread_info.h>
35#include <linux/uaccess.h>
36
37#include <asm/byteorder.h>
38#include <asm/cpu.h>
39#include <asm/cpu-info.h>
40#include <asm/fpu.h>
41#include <asm/lbt.h>
41#include <asm/loongarch.h>
42#include <asm/page.h>
43#include <asm/pgtable.h>
44#include <asm/processor.h>
45#include <asm/ptrace.h>
46#include <asm/reg.h>
47#include <asm/syscall.h>
48

--- 284 unchanged lines hidden (view full) ---

333 }
334 }
335
336 return err;
337}
338
339#endif /* CONFIG_CPU_HAS_LSX */
340
42#include <asm/loongarch.h>
43#include <asm/page.h>
44#include <asm/pgtable.h>
45#include <asm/processor.h>
46#include <asm/ptrace.h>
47#include <asm/reg.h>
48#include <asm/syscall.h>
49

--- 284 unchanged lines hidden (view full) ---

334 }
335 }
336
337 return err;
338}
339
340#endif /* CONFIG_CPU_HAS_LSX */
341
342#ifdef CONFIG_CPU_HAS_LBT
343static int lbt_get(struct task_struct *target,
344 const struct user_regset *regset,
345 struct membuf to)
346{
347 int r;
348
349 r = membuf_write(&to, &target->thread.lbt.scr0, sizeof(target->thread.lbt.scr0));
350 r = membuf_write(&to, &target->thread.lbt.scr1, sizeof(target->thread.lbt.scr1));
351 r = membuf_write(&to, &target->thread.lbt.scr2, sizeof(target->thread.lbt.scr2));
352 r = membuf_write(&to, &target->thread.lbt.scr3, sizeof(target->thread.lbt.scr3));
353 r = membuf_write(&to, &target->thread.lbt.eflags, sizeof(u32));
354 r = membuf_write(&to, &target->thread.fpu.ftop, sizeof(u32));
355
356 return r;
357}
358
359static int lbt_set(struct task_struct *target,
360 const struct user_regset *regset,
361 unsigned int pos, unsigned int count,
362 const void *kbuf, const void __user *ubuf)
363{
364 int err = 0;
365 const int eflags_start = 4 * sizeof(target->thread.lbt.scr0);
366 const int ftop_start = eflags_start + sizeof(u32);
367
368 err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
369 &target->thread.lbt.scr0,
370 0, 4 * sizeof(target->thread.lbt.scr0));
371 err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
372 &target->thread.lbt.eflags,
373 eflags_start, ftop_start);
374 err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
375 &target->thread.fpu.ftop,
376 ftop_start, ftop_start + sizeof(u32));
377
378 return err;
379}
380#endif /* CONFIG_CPU_HAS_LBT */
381
341#ifdef CONFIG_HAVE_HW_BREAKPOINT
342
343/*
344 * Handle hitting a HW-breakpoint.
345 */
346static void ptrace_hbptriggered(struct perf_event *bp,
347 struct perf_sample_data *data,
348 struct pt_regs *regs)

--- 448 unchanged lines hidden (view full) ---

797 REGSET_FPR,
798 REGSET_CPUCFG,
799#ifdef CONFIG_CPU_HAS_LSX
800 REGSET_LSX,
801#endif
802#ifdef CONFIG_CPU_HAS_LASX
803 REGSET_LASX,
804#endif
382#ifdef CONFIG_HAVE_HW_BREAKPOINT
383
384/*
385 * Handle hitting a HW-breakpoint.
386 */
387static void ptrace_hbptriggered(struct perf_event *bp,
388 struct perf_sample_data *data,
389 struct pt_regs *regs)

--- 448 unchanged lines hidden (view full) ---

838 REGSET_FPR,
839 REGSET_CPUCFG,
840#ifdef CONFIG_CPU_HAS_LSX
841 REGSET_LSX,
842#endif
843#ifdef CONFIG_CPU_HAS_LASX
844 REGSET_LASX,
845#endif
846#ifdef CONFIG_CPU_HAS_LBT
847 REGSET_LBT,
848#endif
805#ifdef CONFIG_HAVE_HW_BREAKPOINT
806 REGSET_HW_BREAK,
807 REGSET_HW_WATCH,
808#endif
809};
810
811static const struct user_regset loongarch64_regsets[] = {
812 [REGSET_GPR] = {

--- 35 unchanged lines hidden (view full) ---

848 .core_note_type = NT_LOONGARCH_LASX,
849 .n = NUM_FPU_REGS,
850 .size = 32,
851 .align = 32,
852 .regset_get = simd_get,
853 .set = simd_set,
854 },
855#endif
849#ifdef CONFIG_HAVE_HW_BREAKPOINT
850 REGSET_HW_BREAK,
851 REGSET_HW_WATCH,
852#endif
853};
854
855static const struct user_regset loongarch64_regsets[] = {
856 [REGSET_GPR] = {

--- 35 unchanged lines hidden (view full) ---

892 .core_note_type = NT_LOONGARCH_LASX,
893 .n = NUM_FPU_REGS,
894 .size = 32,
895 .align = 32,
896 .regset_get = simd_get,
897 .set = simd_set,
898 },
899#endif
900#ifdef CONFIG_CPU_HAS_LBT
901 [REGSET_LBT] = {
902 .core_note_type = NT_LOONGARCH_LBT,
903 .n = 5,
904 .size = sizeof(u64),
905 .align = sizeof(u64),
906 .regset_get = lbt_get,
907 .set = lbt_set,
908 },
909#endif
856#ifdef CONFIG_HAVE_HW_BREAKPOINT
857 [REGSET_HW_BREAK] = {
858 .core_note_type = NT_LOONGARCH_HW_BREAK,
859 .n = sizeof(struct user_watch_state) / sizeof(u32),
860 .size = sizeof(u32),
861 .align = sizeof(u32),
862 .regset_get = hw_break_get,
863 .set = hw_break_set,

--- 163 unchanged lines hidden --- 		910#ifdef CONFIG_HAVE_HW_BREAKPOINT
911 [REGSET_HW_BREAK] = {
912 .core_note_type = NT_LOONGARCH_HW_BREAK,
913 .n = sizeof(struct user_watch_state) / sizeof(u32),
914 .size = sizeof(u32),
915 .align = sizeof(u32),
916 .regset_get = hw_break_get,
917 .set = hw_break_set,

--- 163 unchanged lines hidden ---