processor.h (446279168e030fd0ed68e2bba336bef8bb3da352) | processor.h (93a4fa622eb061f75f87f0cf9609ab4e69c67d01) |
---|---|
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5#ifndef _ASM_PROCESSOR_H 6#define _ASM_PROCESSOR_H 7 8#include <linux/atomic.h> --- 66 unchanged lines hidden (view full) --- 75 fpr->val##width[FPR_IDX(width, idx)] = val; \ 76} 77 78BUILD_FPR_ACCESS(32) 79BUILD_FPR_ACCESS(64) 80 81struct loongarch_fpu { 82 unsigned int fcsr; | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5#ifndef _ASM_PROCESSOR_H 6#define _ASM_PROCESSOR_H 7 8#include <linux/atomic.h> --- 66 unchanged lines hidden (view full) --- 75 fpr->val##width[FPR_IDX(width, idx)] = val; \ 76} 77 78BUILD_FPR_ACCESS(32) 79BUILD_FPR_ACCESS(64) 80 81struct loongarch_fpu { 82 unsigned int fcsr; |
83 unsigned int vcsr; | |
84 uint64_t fcc; /* 8x8 */ 85 union fpureg fpr[NUM_FPU_REGS]; 86}; 87 88#define INIT_CPUMASK { \ 89 {0,} \ 90} 91 --- 5 unchanged lines hidden (view full) --- 97 * If you change thread_struct remember to change the #defines below too! 98 */ 99struct thread_struct { 100 /* Main processor registers. */ 101 unsigned long reg01, reg03, reg22; /* ra sp fp */ 102 unsigned long reg23, reg24, reg25, reg26; /* s0-s3 */ 103 unsigned long reg27, reg28, reg29, reg30, reg31; /* s4-s8 */ 104 | 83 uint64_t fcc; /* 8x8 */ 84 union fpureg fpr[NUM_FPU_REGS]; 85}; 86 87#define INIT_CPUMASK { \ 88 {0,} \ 89} 90 --- 5 unchanged lines hidden (view full) --- 96 * If you change thread_struct remember to change the #defines below too! 97 */ 98struct thread_struct { 99 /* Main processor registers. */ 100 unsigned long reg01, reg03, reg22; /* ra sp fp */ 101 unsigned long reg23, reg24, reg25, reg26; /* s0-s3 */ 102 unsigned long reg27, reg28, reg29, reg30, reg31; /* s4-s8 */ 103 |
104 /* __schedule() return address / call frame address */ 105 unsigned long sched_ra; 106 unsigned long sched_cfa; 107 |
|
105 /* CSR registers */ 106 unsigned long csr_prmd; 107 unsigned long csr_crmd; 108 unsigned long csr_euen; 109 unsigned long csr_ecfg; 110 unsigned long csr_badvaddr; /* Last user fault */ 111 112 /* Scratch registers */ --- 12 unchanged lines hidden (view full) --- 125 126 /* 127 * FPU & vector registers, must be at last because 128 * they are conditionally copied at fork(). 129 */ 130 struct loongarch_fpu fpu FPU_ALIGN; 131}; 132 | 108 /* CSR registers */ 109 unsigned long csr_prmd; 110 unsigned long csr_crmd; 111 unsigned long csr_euen; 112 unsigned long csr_ecfg; 113 unsigned long csr_badvaddr; /* Last user fault */ 114 115 /* Scratch registers */ --- 12 unchanged lines hidden (view full) --- 128 129 /* 130 * FPU & vector registers, must be at last because 131 * they are conditionally copied at fork(). 132 */ 133 struct loongarch_fpu fpu FPU_ALIGN; 134}; 135 |
136#define thread_saved_ra(tsk) (tsk->thread.sched_ra) 137#define thread_saved_fp(tsk) (tsk->thread.sched_cfa) 138 |
|
133#define INIT_THREAD { \ 134 /* \ 135 * Main processor registers \ 136 */ \ 137 .reg01 = 0, \ 138 .reg03 = 0, \ 139 .reg22 = 0, \ 140 .reg23 = 0, \ 141 .reg24 = 0, \ 142 .reg25 = 0, \ 143 .reg26 = 0, \ 144 .reg27 = 0, \ 145 .reg28 = 0, \ 146 .reg29 = 0, \ 147 .reg30 = 0, \ 148 .reg31 = 0, \ | 139#define INIT_THREAD { \ 140 /* \ 141 * Main processor registers \ 142 */ \ 143 .reg01 = 0, \ 144 .reg03 = 0, \ 145 .reg22 = 0, \ 146 .reg23 = 0, \ 147 .reg24 = 0, \ 148 .reg25 = 0, \ 149 .reg26 = 0, \ 150 .reg27 = 0, \ 151 .reg28 = 0, \ 152 .reg29 = 0, \ 153 .reg30 = 0, \ 154 .reg31 = 0, \ |
155 .sched_ra = 0, \ 156 .sched_cfa = 0, \ |
|
149 .csr_crmd = 0, \ 150 .csr_prmd = 0, \ 151 .csr_euen = 0, \ 152 .csr_ecfg = 0, \ 153 .csr_badvaddr = 0, \ 154 /* \ 155 * Other stuff associated with the process \ 156 */ \ 157 .trap_nr = 0, \ 158 .error_code = 0, \ 159 /* \ 160 * FPU & vector registers \ 161 */ \ 162 .fpu = { \ 163 .fcsr = 0, \ | 157 .csr_crmd = 0, \ 158 .csr_prmd = 0, \ 159 .csr_euen = 0, \ 160 .csr_ecfg = 0, \ 161 .csr_badvaddr = 0, \ 162 /* \ 163 * Other stuff associated with the process \ 164 */ \ 165 .trap_nr = 0, \ 166 .error_code = 0, \ 167 /* \ 168 * FPU & vector registers \ 169 */ \ 170 .fpu = { \ 171 .fcsr = 0, \ |
164 .vcsr = 0, \ | |
165 .fcc = 0, \ 166 .fpr = {{{0,},},}, \ 167 }, \ 168} 169 170struct task_struct; 171 172/* Free all resources held by a thread. */ --- 37 unchanged lines hidden --- | 172 .fcc = 0, \ 173 .fpr = {{{0,},},}, \ 174 }, \ 175} 176 177struct task_struct; 178 179/* Free all resources held by a thread. */ --- 37 unchanged lines hidden --- |