loongarch.h (987cbafe628ae67fe6cad0ce1dcc41743147ef3e) loongarch.h (34e3c4500cdc06094b37a41b622598098308ba8f)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 */
5#ifndef _ASM_LOONGARCH_H
6#define _ASM_LOONGARCH_H
7
8#include <linux/bits.h>

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57
58/* Bit fields for CPUCFG registers */
59#define LOONGARCH_CPUCFG0 0x0
60#define CPUCFG0_PRID GENMASK(31, 0)
61
62#define LOONGARCH_CPUCFG1 0x1
63#define CPUCFG1_ISGR32 BIT(0)
64#define CPUCFG1_ISGR64 BIT(1)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 */
5#ifndef _ASM_LOONGARCH_H
6#define _ASM_LOONGARCH_H
7
8#include <linux/bits.h>

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57
58/* Bit fields for CPUCFG registers */
59#define LOONGARCH_CPUCFG0 0x0
60#define CPUCFG0_PRID GENMASK(31, 0)
61
62#define LOONGARCH_CPUCFG1 0x1
63#define CPUCFG1_ISGR32 BIT(0)
64#define CPUCFG1_ISGR64 BIT(1)
65#define CPUCFG1_ISA GENMASK(1, 0)
65#define CPUCFG1_PAGING BIT(2)
66#define CPUCFG1_IOCSR BIT(3)
67#define CPUCFG1_PABITS GENMASK(11, 4)
68#define CPUCFG1_VABITS GENMASK(19, 12)
69#define CPUCFG1_UAL BIT(20)
70#define CPUCFG1_RI BIT(21)
71#define CPUCFG1_EP BIT(22)
72#define CPUCFG1_RPLV BIT(23)

--- 1404 unchanged lines hidden --- 		66#define CPUCFG1_PAGING BIT(2)
67#define CPUCFG1_IOCSR BIT(3)
68#define CPUCFG1_PABITS GENMASK(11, 4)
69#define CPUCFG1_VABITS GENMASK(19, 12)
70#define CPUCFG1_UAL BIT(20)
71#define CPUCFG1_RI BIT(21)
72#define CPUCFG1_EP BIT(22)
73#define CPUCFG1_RPLV BIT(23)

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