loongarch.h (8ff81bb24f68f747ab2f738c3d493b9c2cad52bf) loongarch.h (bd3c5798484aa9a08302a844d7a75a2ee3b53d05)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 */
5#ifndef _ASM_LOONGARCH_H
6#define _ASM_LOONGARCH_H
7
8#include <linux/bits.h>

--- 1396 unchanged lines hidden (view full) ---

1405
1406/* Bits 8 and 9 of FPU Status Register specify the rounding mode */
1407#define FPU_CSR_RM 0x300
1408#define FPU_CSR_RN 0x000 /* nearest */
1409#define FPU_CSR_RZ 0x100 /* towards zero */
1410#define FPU_CSR_RU 0x200 /* towards +Infinity */
1411#define FPU_CSR_RD 0x300 /* towards -Infinity */
1412
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 */
5#ifndef _ASM_LOONGARCH_H
6#define _ASM_LOONGARCH_H
7
8#include <linux/bits.h>

--- 1396 unchanged lines hidden (view full) ---

1405
1406/* Bits 8 and 9 of FPU Status Register specify the rounding mode */
1407#define FPU_CSR_RM 0x300
1408#define FPU_CSR_RN 0x000 /* nearest */
1409#define FPU_CSR_RZ 0x100 /* towards zero */
1410#define FPU_CSR_RU 0x200 /* towards +Infinity */
1411#define FPU_CSR_RD 0x300 /* towards -Infinity */
1412
1413/* Bit 6 of FPU Status Register specify the LBT TOP simulation mode */
1414#define FPU_CSR_TM_SHIFT 0x6
1415#define FPU_CSR_TM (_ULCAST_(1) << FPU_CSR_TM_SHIFT)
1416
1413#define read_fcsr(source) \
1414({ \
1415 unsigned int __res; \
1416\
1417 __asm__ __volatile__( \
1418 " movfcsr2gr %0, "__stringify(source)" \n" \
1419 : "=r" (__res)); \
1420 __res; \
1421})
1422
1423#define write_fcsr(dest, val) \
1424do { \
1425 __asm__ __volatile__( \
1426 " movgr2fcsr "__stringify(dest)", %0 \n" \
1427 : : "r" (val)); \
1428} while (0)
1429
1430#endif /* _ASM_LOONGARCH_H */
1417#define read_fcsr(source) \
1418({ \
1419 unsigned int __res; \
1420\
1421 __asm__ __volatile__( \
1422 " movfcsr2gr %0, "__stringify(source)" \n" \
1423 : "=r" (__res)); \
1424 __res; \
1425})
1426
1427#define write_fcsr(dest, val) \
1428do { \
1429 __asm__ __volatile__( \
1430 " movgr2fcsr "__stringify(dest)", %0 \n" \
1431 : : "r" (val)); \
1432} while (0)
1433
1434#endif /* _ASM_LOONGARCH_H */