asmmacro.h (8ff81bb24f68f747ab2f738c3d493b9c2cad52bf) | asmmacro.h (bd3c5798484aa9a08302a844d7a75a2ee3b53d05) |
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1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5#ifndef _ASM_ASMMACRO_H 6#define _ASM_ASMMACRO_H 7 8#include <asm/asm-offsets.h> --- 27 unchanged lines hidden (view full) --- 36 ldptr.d s8, \thread, THREAD_REG31 37 ldptr.d ra, \thread, THREAD_REG01 38 ldptr.d sp, \thread, THREAD_REG03 39 ldptr.d fp, \thread, THREAD_REG22 40 .endm 41 42 .macro fpu_save_csr thread tmp 43 movfcsr2gr \tmp, fcsr0 | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5#ifndef _ASM_ASMMACRO_H 6#define _ASM_ASMMACRO_H 7 8#include <asm/asm-offsets.h> --- 27 unchanged lines hidden (view full) --- 36 ldptr.d s8, \thread, THREAD_REG31 37 ldptr.d ra, \thread, THREAD_REG01 38 ldptr.d sp, \thread, THREAD_REG03 39 ldptr.d fp, \thread, THREAD_REG22 40 .endm 41 42 .macro fpu_save_csr thread tmp 43 movfcsr2gr \tmp, fcsr0 |
44 stptr.w \tmp, \thread, THREAD_FCSR | 44 stptr.w \tmp, \thread, THREAD_FCSR 45#ifdef CONFIG_CPU_HAS_LBT 46 /* TM bit is always 0 if LBT not supported */ 47 andi \tmp, \tmp, FPU_CSR_TM 48 beqz \tmp, 1f 49 /* Save FTOP */ 50 x86mftop \tmp 51 stptr.w \tmp, \thread, THREAD_FTOP 52 /* Turn off TM to ensure the order of FPR in memory independent of TM */ 53 x86clrtm 541: 55#endif |
45 .endm 46 | 56 .endm 57 |
47 .macro fpu_restore_csr thread tmp 48 ldptr.w \tmp, \thread, THREAD_FCSR 49 movgr2fcsr fcsr0, \tmp | 58 .macro fpu_restore_csr thread tmp0 tmp1 59 ldptr.w \tmp0, \thread, THREAD_FCSR 60 movgr2fcsr fcsr0, \tmp0 61#ifdef CONFIG_CPU_HAS_LBT 62 /* TM bit is always 0 if LBT not supported */ 63 andi \tmp0, \tmp0, FPU_CSR_TM 64 beqz \tmp0, 2f 65 /* Restore FTOP */ 66 ldptr.w \tmp0, \thread, THREAD_FTOP 67 andi \tmp0, \tmp0, 0x7 68 la.pcrel \tmp1, 1f 69 alsl.d \tmp1, \tmp0, \tmp1, 3 70 jr \tmp1 711: 72 x86mttop 0 73 b 2f 74 x86mttop 1 75 b 2f 76 x86mttop 2 77 b 2f 78 x86mttop 3 79 b 2f 80 x86mttop 4 81 b 2f 82 x86mttop 5 83 b 2f 84 x86mttop 6 85 b 2f 86 x86mttop 7 872: 88#endif |
50 .endm 51 52 .macro fpu_save_cc thread tmp0 tmp1 53 movcf2gr \tmp0, $fcc0 54 move \tmp1, \tmp0 55 movcf2gr \tmp0, $fcc1 56 bstrins.d \tmp1, \tmp0, 15, 8 57 movcf2gr \tmp0, $fcc2 --- 183 unchanged lines hidden (view full) --- 241 fpu_save_cc \thread, \tmp0, \tmp1 242 fpu_save_csr \thread, \tmp0 243 lsx_save_data \thread, \tmp0 244 .endm 245 246 .macro lsx_restore_all thread tmp0 tmp1 247 lsx_restore_data \thread, \tmp0 248 fpu_restore_cc \thread, \tmp0, \tmp1 | 89 .endm 90 91 .macro fpu_save_cc thread tmp0 tmp1 92 movcf2gr \tmp0, $fcc0 93 move \tmp1, \tmp0 94 movcf2gr \tmp0, $fcc1 95 bstrins.d \tmp1, \tmp0, 15, 8 96 movcf2gr \tmp0, $fcc2 --- 183 unchanged lines hidden (view full) --- 280 fpu_save_cc \thread, \tmp0, \tmp1 281 fpu_save_csr \thread, \tmp0 282 lsx_save_data \thread, \tmp0 283 .endm 284 285 .macro lsx_restore_all thread tmp0 tmp1 286 lsx_restore_data \thread, \tmp0 287 fpu_restore_cc \thread, \tmp0, \tmp1 |
249 fpu_restore_csr \thread, \tmp0 | 288 fpu_restore_csr \thread, \tmp0, \tmp1 |
250 .endm 251 252 .macro lsx_save_upper vd base tmp off 253 vpickve2gr.d \tmp, \vd, 1 254 st.d \tmp, \base, (\off+8) 255 .endm 256 257 .macro lsx_save_all_upper thread base tmp --- 193 unchanged lines hidden (view full) --- 451 fpu_save_cc \thread, \tmp0, \tmp1 452 fpu_save_csr \thread, \tmp0 453 lasx_save_data \thread, \tmp0 454 .endm 455 456 .macro lasx_restore_all thread tmp0 tmp1 457 lasx_restore_data \thread, \tmp0 458 fpu_restore_cc \thread, \tmp0, \tmp1 | 289 .endm 290 291 .macro lsx_save_upper vd base tmp off 292 vpickve2gr.d \tmp, \vd, 1 293 st.d \tmp, \base, (\off+8) 294 .endm 295 296 .macro lsx_save_all_upper thread base tmp --- 193 unchanged lines hidden (view full) --- 490 fpu_save_cc \thread, \tmp0, \tmp1 491 fpu_save_csr \thread, \tmp0 492 lasx_save_data \thread, \tmp0 493 .endm 494 495 .macro lasx_restore_all thread tmp0 tmp1 496 lasx_restore_data \thread, \tmp0 497 fpu_restore_cc \thread, \tmp0, \tmp1 |
459 fpu_restore_csr \thread, \tmp0 | 498 fpu_restore_csr \thread, \tmp0, \tmp1 |
460 .endm 461 462 .macro lasx_save_upper xd base tmp off 463 /* Nothing */ 464 .endm 465 466 .macro lasx_save_all_upper thread base tmp 467 /* Nothing */ --- 113 unchanged lines hidden --- | 499 .endm 500 501 .macro lasx_save_upper xd base tmp off 502 /* Nothing */ 503 .endm 504 505 .macro lasx_save_all_upper thread base tmp 506 /* Nothing */ --- 113 unchanged lines hidden --- |