cmpxchg.h (f83d9396d1f63048c423efa00e4e244da10a35fd) cmpxchg.h (45e15c1a375ea380d55880be2f8182cb737b60ed)
1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifndef __ASM_CSKY_CMPXCHG_H
4#define __ASM_CSKY_CMPXCHG_H
5
6#ifdef CONFIG_SMP
7#include <asm/barrier.h>
8
9extern void __bad_xchg(void);
10
11#define __xchg_relaxed(new, ptr, size) \
12({ \
13 __typeof__(ptr) __ptr = (ptr); \
14 __typeof__(new) __new = (new); \
15 __typeof__(*(ptr)) __ret; \
16 unsigned long tmp; \
17 switch (size) { \
1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifndef __ASM_CSKY_CMPXCHG_H
4#define __ASM_CSKY_CMPXCHG_H
5
6#ifdef CONFIG_SMP
7#include <asm/barrier.h>
8
9extern void __bad_xchg(void);
10
11#define __xchg_relaxed(new, ptr, size) \
12({ \
13 __typeof__(ptr) __ptr = (ptr); \
14 __typeof__(new) __new = (new); \
15 __typeof__(*(ptr)) __ret; \
16 unsigned long tmp; \
17 switch (size) { \
18 case 2: { \
19 u32 ret; \
20 u32 shif = ((ulong)__ptr & 2) ? 16 : 0; \
21 u32 mask = 0xffff << shif; \
22 __ptr = (__typeof__(ptr))((ulong)__ptr & ~2); \
23 __asm__ __volatile__ ( \
24 "1: ldex.w %0, (%4)\n" \
25 " and %1, %0, %2\n" \
26 " or %1, %1, %3\n" \
27 " stex.w %1, (%4)\n" \
28 " bez %1, 1b\n" \
29 : "=&r" (ret), "=&r" (tmp) \
30 : "r" (~mask), \
31 "r" ((u32)__new << shif), \
32 "r" (__ptr) \
33 : "memory"); \
34 __ret = (__typeof__(*(ptr))) \
35 ((ret & mask) >> shif); \
36 break; \
37 } \
18 case 4: \
19 asm volatile ( \
20 "1: ldex.w %0, (%3) \n" \
21 " mov %1, %2 \n" \
22 " stex.w %1, (%3) \n" \
23 " bez %1, 1b \n" \
24 : "=&r" (__ret), "=&r" (tmp) \
25 : "r" (__new), "r"(__ptr) \

--- 111 unchanged lines hidden --- 		38 case 4: \
39 asm volatile ( \
40 "1: ldex.w %0, (%3) \n" \
41 " mov %1, %2 \n" \
42 " stex.w %1, (%3) \n" \
43 " bez %1, 1b \n" \
44 : "=&r" (__ret), "=&r" (tmp) \
45 : "r" (__new), "r"(__ptr) \

--- 111 unchanged lines hidden ---