debug.c (b04b3315021a524d5eecdb6de0d24cf7371d4abf) | debug.c (34fbdee086cfcc20fe889d2b83afddfbe2ac3096) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Debug and Guest Debug support 4 * 5 * Copyright (C) 2015 - Linaro Ltd 6 * Author: Alex Bennée <alex.bennee@linaro.org> 7 */ 8 --- 18 unchanged lines hidden (view full) --- 27 * save/restore_guest_debug_regs 28 * 29 * For some debug operations we need to tweak some guest registers. As 30 * a result we need to save the state of those registers before we 31 * make those modifications. 32 * 33 * Guest access to MDSCR_EL1 is trapped by the hypervisor and handled 34 * after we have restored the preserved value to the main context. | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Debug and Guest Debug support 4 * 5 * Copyright (C) 2015 - Linaro Ltd 6 * Author: Alex Bennée <alex.bennee@linaro.org> 7 */ 8 --- 18 unchanged lines hidden (view full) --- 27 * save/restore_guest_debug_regs 28 * 29 * For some debug operations we need to tweak some guest registers. As 30 * a result we need to save the state of those registers before we 31 * make those modifications. 32 * 33 * Guest access to MDSCR_EL1 is trapped by the hypervisor and handled 34 * after we have restored the preserved value to the main context. |
35 * 36 * When single-step is enabled by userspace, we tweak PSTATE.SS on every 37 * guest entry. Preserve PSTATE.SS so we can restore the original value 38 * for the vcpu after the single-step is disabled. |
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35 */ 36static void save_guest_debug_regs(struct kvm_vcpu *vcpu) 37{ 38 u64 val = vcpu_read_sys_reg(vcpu, MDSCR_EL1); 39 40 vcpu->arch.guest_debug_preserved.mdscr_el1 = val; 41 42 trace_kvm_arm_set_dreg32("Saved MDSCR_EL1", 43 vcpu->arch.guest_debug_preserved.mdscr_el1); | 39 */ 40static void save_guest_debug_regs(struct kvm_vcpu *vcpu) 41{ 42 u64 val = vcpu_read_sys_reg(vcpu, MDSCR_EL1); 43 44 vcpu->arch.guest_debug_preserved.mdscr_el1 = val; 45 46 trace_kvm_arm_set_dreg32("Saved MDSCR_EL1", 47 vcpu->arch.guest_debug_preserved.mdscr_el1); |
48 49 vcpu->arch.guest_debug_preserved.pstate_ss = 50 (*vcpu_cpsr(vcpu) & DBG_SPSR_SS); |
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44} 45 46static void restore_guest_debug_regs(struct kvm_vcpu *vcpu) 47{ 48 u64 val = vcpu->arch.guest_debug_preserved.mdscr_el1; 49 50 vcpu_write_sys_reg(vcpu, val, MDSCR_EL1); 51 52 trace_kvm_arm_set_dreg32("Restored MDSCR_EL1", 53 vcpu_read_sys_reg(vcpu, MDSCR_EL1)); | 51} 52 53static void restore_guest_debug_regs(struct kvm_vcpu *vcpu) 54{ 55 u64 val = vcpu->arch.guest_debug_preserved.mdscr_el1; 56 57 vcpu_write_sys_reg(vcpu, val, MDSCR_EL1); 58 59 trace_kvm_arm_set_dreg32("Restored MDSCR_EL1", 60 vcpu_read_sys_reg(vcpu, MDSCR_EL1)); |
61 62 if (vcpu->arch.guest_debug_preserved.pstate_ss) 63 *vcpu_cpsr(vcpu) |= DBG_SPSR_SS; 64 else 65 *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; |
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54} 55 56/** 57 * kvm_arm_init_debug - grab what we need for debug 58 * 59 * Currently the sole task of this function is to retrieve the initial 60 * value of mdcr_el2 so we can preserve MDCR_EL2.HPMN which has 61 * presumably been set-up by some knowledgeable bootcode. --- 228 unchanged lines hidden (view full) --- 290 if (has_vhe()) 291 return; 292 293 dfr0 = read_sysreg(id_aa64dfr0_el1); 294 /* 295 * If SPE is present on this CPU and is available at current EL, 296 * we may need to check if the host state needs to be saved. 297 */ | 66} 67 68/** 69 * kvm_arm_init_debug - grab what we need for debug 70 * 71 * Currently the sole task of this function is to retrieve the initial 72 * value of mdcr_el2 so we can preserve MDCR_EL2.HPMN which has 73 * presumably been set-up by some knowledgeable bootcode. --- 228 unchanged lines hidden (view full) --- 302 if (has_vhe()) 303 return; 304 305 dfr0 = read_sysreg(id_aa64dfr0_el1); 306 /* 307 * If SPE is present on this CPU and is available at current EL, 308 * we may need to check if the host state needs to be saved. 309 */ |
298 if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHIFT) && | 310 if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_PMSVER_SHIFT) && |
299 !(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(SYS_PMBIDR_EL1_P_SHIFT))) 300 vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_SPE); 301 302 /* Check if we have TRBE implemented and available at the host */ | 311 !(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(SYS_PMBIDR_EL1_P_SHIFT))) 312 vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_SPE); 313 314 /* Check if we have TRBE implemented and available at the host */ |
303 if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) && | 315 if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_TRBE_SHIFT) && |
304 !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_PROG)) 305 vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE); 306} 307 308void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu) 309{ 310 vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE); 311 vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE); 312} | 316 !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_PROG)) 317 vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE); 318} 319 320void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu) 321{ 322 vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE); 323 vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE); 324} |