traps.c (ae976f063b605dd558571eff40c8229ffbc39e24) traps.c (2e77a62cb3a6d2eb9dd875516411bcd131dd04e7)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Based on arch/arm/kernel/traps.c
4 *
5 * Copyright (C) 1995-2009 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8

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522 if (address >= user_addr_max()) { \
523 res = -EFAULT; \
524 } else { \
525 uaccess_ttbr0_enable(); \
526 asm volatile ( \
527 "1: " insn ", %1\n" \
528 " mov %w0, #0\n" \
529 "2:\n" \
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Based on arch/arm/kernel/traps.c
4 *
5 * Copyright (C) 1995-2009 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8

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522 if (address >= user_addr_max()) { \
523 res = -EFAULT; \
524 } else { \
525 uaccess_ttbr0_enable(); \
526 asm volatile ( \
527 "1: " insn ", %1\n" \
528 " mov %w0, #0\n" \
529 "2:\n" \
530 " .pushsection .fixup,\"ax\"\n" \
531 " .align 2\n" \
532 "3: mov %w0, %w2\n" \
533 " b 2b\n" \
534 " .popsection\n" \
535 _ASM_EXTABLE(1b, 3b) \
530 _ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0) \
536 : "=r" (res) \
531 : "=r" (res) \
537 : "r" (address), "i" (-EFAULT)); \
532 : "r" (address)); \
538 uaccess_ttbr0_disable(); \
539 }
540
541static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
542{
543 unsigned long tagged_address, address;
544 int rt = ESR_ELx_SYS64_ISS_RT(esr);
545 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;

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649 },
650 {
651 /* Trap read access to CNTVCT_EL0 */
652 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
653 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
654 .handler = cntvct_read_handler,
655 },
656 {
533 uaccess_ttbr0_disable(); \
534 }
535
536static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
537{
538 unsigned long tagged_address, address;
539 int rt = ESR_ELx_SYS64_ISS_RT(esr);
540 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;

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644 },
645 {
646 /* Trap read access to CNTVCT_EL0 */
647 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
648 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
649 .handler = cntvct_read_handler,
650 },
651 {
657 /* Trap read access to CNTVCTSS_EL0 */
658 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
659 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCTSS,
660 .handler = cntvct_read_handler,
661 },
662 {
663 /* Trap read access to CNTFRQ_EL0 */
664 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
665 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
666 .handler = cntfrq_read_handler,
667 },
668 {
669 /* Trap read access to CPUID registers */
670 .esr_mask = ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK,

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730}
731
732static const struct sys64_hook cp15_64_hooks[] = {
733 {
734 .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK,
735 .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT,
736 .handler = compat_cntvct_read_handler,
737 },
652 /* Trap read access to CNTFRQ_EL0 */
653 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
654 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
655 .handler = cntfrq_read_handler,
656 },
657 {
658 /* Trap read access to CPUID registers */
659 .esr_mask = ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK,

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719}
720
721static const struct sys64_hook cp15_64_hooks[] = {
722 {
723 .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK,
724 .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT,
725 .handler = compat_cntvct_read_handler,
726 },
738 {
739 .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK,
740 .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS,
741 .handler = compat_cntvct_read_handler,
742 },
743 {},
744};
745
746void do_cp15instr(unsigned int esr, struct pt_regs *regs)
747{
748 const struct sys64_hook *hook, *hook_base;
749
750 if (!cp15_cond_valid(esr, regs)) {

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728};
729
730void do_cp15instr(unsigned int esr, struct pt_regs *regs)
731{
732 const struct sys64_hook *hook, *hook_base;
733
734 if (!cp15_cond_valid(esr, regs)) {

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