sys_compat.c (2b4f44eec2be2688511c2b617d0e1b4f94c45ba4) sys_compat.c (65896545b69ffaac947c12e11d3dcc57fd1fb772)
1/*
2 * Based on arch/arm/kernel/sys_arm.c
3 *
4 * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
5 * Copyright (C) 1995, 1996 Russell King.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify

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22#include <linux/personality.h>
23#include <linux/sched.h>
24#include <linux/sched/signal.h>
25#include <linux/slab.h>
26#include <linux/syscalls.h>
27#include <linux/uaccess.h>
28
29#include <asm/cacheflush.h>
1/*
2 * Based on arch/arm/kernel/sys_arm.c
3 *
4 * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
5 * Copyright (C) 1995, 1996 Russell King.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify

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22#include <linux/personality.h>
23#include <linux/sched.h>
24#include <linux/sched/signal.h>
25#include <linux/slab.h>
26#include <linux/syscalls.h>
27#include <linux/uaccess.h>
28
29#include <asm/cacheflush.h>
30#include <asm/system_misc.h>
30#include <asm/unistd.h>
31
32static long
33__do_compat_cache_op(unsigned long start, unsigned long end)
34{
35 long ret;
36
37 do {

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62
63 return __do_compat_cache_op(start, end);
64}
65/*
66 * Handle all unrecognised system calls.
67 */
68long compat_arm_syscall(struct pt_regs *regs)
69{
31#include <asm/unistd.h>
32
33static long
34__do_compat_cache_op(unsigned long start, unsigned long end)
35{
36 long ret;
37
38 do {

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63
64 return __do_compat_cache_op(start, end);
65}
66/*
67 * Handle all unrecognised system calls.
68 */
69long compat_arm_syscall(struct pt_regs *regs)
70{
71 siginfo_t info;
70 unsigned int no = regs->regs[7];
71
72 switch (no) {
73 /*
74 * Flush a region from virtual address 'r0' to virtual address 'r1'
75 * _exclusive_. There is no alignment requirement on either address;
76 * user space does not need to know the hardware cache layout.
77 *

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83 * various aspects of the cache. Passing '0' will guarantee that
84 * everything necessary gets flushed to maintain consistency in
85 * the specified region).
86 */
87 case __ARM_NR_compat_cacheflush:
88 return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
89
90 case __ARM_NR_compat_set_tls:
72 unsigned int no = regs->regs[7];
73
74 switch (no) {
75 /*
76 * Flush a region from virtual address 'r0' to virtual address 'r1'
77 * _exclusive_. There is no alignment requirement on either address;
78 * user space does not need to know the hardware cache layout.
79 *

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85 * various aspects of the cache. Passing '0' will guarantee that
86 * everything necessary gets flushed to maintain consistency in
87 * the specified region).
88 */
89 case __ARM_NR_compat_cacheflush:
90 return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
91
92 case __ARM_NR_compat_set_tls:
91 current->thread.tp_value = regs->regs[0];
93 current->thread.uw.tp_value = regs->regs[0];
92
93 /*
94 * Protect against register corruption from context switch.
95 * See comment in tls_thread_flush.
96 */
97 barrier();
98 write_sysreg(regs->regs[0], tpidrro_el0);
99 return 0;
100
101 default:
94
95 /*
96 * Protect against register corruption from context switch.
97 * See comment in tls_thread_flush.
98 */
99 barrier();
100 write_sysreg(regs->regs[0], tpidrro_el0);
101 return 0;
102
103 default:
102 return -ENOSYS;
104 /*
105 * Calls 9f00xx..9f07ff are defined to return -ENOSYS
106 * if not implemented, rather than raising SIGILL. This
107 * way the calling program can gracefully determine whether
108 * a feature is supported.
109 */
110 if ((no & 0xffff) <= 0x7ff)
111 return -ENOSYS;
112 break;
103 }
113 }
114
115 info.si_signo = SIGILL;
116 info.si_errno = 0;
117 info.si_code = ILL_ILLTRP;
118 info.si_addr = (void __user *)instruction_pointer(regs) -
119 (compat_thumb_mode(regs) ? 2 : 4);
120
121 arm64_notify_die("Oops - bad compat syscall(2)", regs, &info, no);
122 return 0;
104}
123}