sc9836.dtsi (23d19ba06b9c5614d6457f5fed349ec8f6d4dac9) | sc9836.dtsi (31af04cd60d3162a58213363fd740a2b0cf0a08e) |
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1/* 2 * Spreadtrum SC9836 SoC DTS file 3 * 4 * Copyright (C) 2014, Spreadtrum Communications Inc. 5 * 6 * This file is licensed under a dual GPLv2 or X11 license. 7 */ 8 --- 4 unchanged lines hidden (view full) --- 13 compatible = "sprd,sc9836"; 14 15 cpus { 16 #address-cells = <2>; 17 #size-cells = <0>; 18 19 cpu0: cpu@0 { 20 device_type = "cpu"; | 1/* 2 * Spreadtrum SC9836 SoC DTS file 3 * 4 * Copyright (C) 2014, Spreadtrum Communications Inc. 5 * 6 * This file is licensed under a dual GPLv2 or X11 license. 7 */ 8 --- 4 unchanged lines hidden (view full) --- 13 compatible = "sprd,sc9836"; 14 15 cpus { 16 #address-cells = <2>; 17 #size-cells = <0>; 18 19 cpu0: cpu@0 { 20 device_type = "cpu"; |
21 compatible = "arm,cortex-a53", "arm,armv8"; | 21 compatible = "arm,cortex-a53"; |
22 reg = <0x0 0x0>; 23 enable-method = "psci"; 24 }; 25 26 cpu1: cpu@1 { 27 device_type = "cpu"; | 22 reg = <0x0 0x0>; 23 enable-method = "psci"; 24 }; 25 26 cpu1: cpu@1 { 27 device_type = "cpu"; |
28 compatible = "arm,cortex-a53", "arm,armv8"; | 28 compatible = "arm,cortex-a53"; |
29 reg = <0x0 0x1>; 30 enable-method = "psci"; 31 }; 32 33 cpu2: cpu@2 { 34 device_type = "cpu"; | 29 reg = <0x0 0x1>; 30 enable-method = "psci"; 31 }; 32 33 cpu2: cpu@2 { 34 device_type = "cpu"; |
35 compatible = "arm,cortex-a53", "arm,armv8"; | 35 compatible = "arm,cortex-a53"; |
36 reg = <0x0 0x2>; 37 enable-method = "psci"; 38 }; 39 40 cpu3: cpu@3 { 41 device_type = "cpu"; | 36 reg = <0x0 0x2>; 37 enable-method = "psci"; 38 }; 39 40 cpu3: cpu@3 { 41 device_type = "cpu"; |
42 compatible = "arm,cortex-a53", "arm,armv8"; | 42 compatible = "arm,cortex-a53"; |
43 reg = <0x0 0x3>; 44 enable-method = "psci"; 45 }; 46 }; 47 48 etf@10003000 { 49 compatible = "arm,coresight-tmc", "arm,primecell"; 50 reg = <0 0x10003000 0 0x1000>; --- 174 unchanged lines hidden --- | 43 reg = <0x0 0x3>; 44 enable-method = "psci"; 45 }; 46 }; 47 48 etf@10003000 { 49 compatible = "arm,coresight-tmc", "arm,primecell"; 50 reg = <0 0x10003000 0 0x1000>; --- 174 unchanged lines hidden --- |