ulcb.dtsi (3eb66e91a25497065c5322b1268cbc3953642227) ulcb.dtsi (5d3b226ace6d8d6f1a9fecbfb21e7e743a88f33c)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8

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78 compatible = "regulator-fixed";
79 regulator-name = "fixed-3.3V";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 regulator-boot-on;
83 regulator-always-on;
84 };
85
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8

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78 compatible = "regulator-fixed";
79 regulator-name = "fixed-3.3V";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 regulator-boot-on;
83 regulator-always-on;
84 };
85
86 rsnd_ak4613: sound {
87 compatible = "simple-audio-card";
86 sound_card: sound {
87 compatible = "audio-graph-card";
88 label = "rcar-sound";
88
89
89 simple-audio-card,format = "left_j";
90 simple-audio-card,bitclock-master = <&sndcpu>;
91 simple-audio-card,frame-master = <&sndcpu>;
92
93 sndcpu: simple-audio-card,cpu {
94 sound-dai = <&rcar_sound>;
95 };
96
97 sndcodec: simple-audio-card,codec {
98 sound-dai = <&ak4613>;
99 };
90 dais = <&rsnd_port0>;
100 };
101
102 vcc_sdhi0: regulator-vcc-sdhi0 {
103 compatible = "regulator-fixed";
104
105 regulator-name = "SDHI0 Vcc";
106 regulator-min-microvolt = <3300000>;
107 regulator-max-microvolt = <3300000>;

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206 asahi-kasei,in1-single-end;
207 asahi-kasei,in2-single-end;
208 asahi-kasei,out1-single-end;
209 asahi-kasei,out2-single-end;
210 asahi-kasei,out3-single-end;
211 asahi-kasei,out4-single-end;
212 asahi-kasei,out5-single-end;
213 asahi-kasei,out6-single-end;
91 };
92
93 vcc_sdhi0: regulator-vcc-sdhi0 {
94 compatible = "regulator-fixed";
95
96 regulator-name = "SDHI0 Vcc";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;

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197 asahi-kasei,in1-single-end;
198 asahi-kasei,in2-single-end;
199 asahi-kasei,out1-single-end;
200 asahi-kasei,out2-single-end;
201 asahi-kasei,out3-single-end;
202 asahi-kasei,out4-single-end;
203 asahi-kasei,out5-single-end;
204 asahi-kasei,out6-single-end;
205
206 port {
207 ak4613_endpoint: endpoint {
208 remote-endpoint = <&rsnd_for_ak4613>;
209 };
210 };
214 };
215
216 cs2000: clk-multiplier@4f {
217 #clock-cells = <0>;
218 compatible = "cirrus,cs2000-cp";
219 reg = <0x4f>;
220 clocks = <&audio_clkout>, <&x12_clk>;
221 clock-names = "clk_in", "ref_clk";

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327 groups = "sdhi0_data4", "sdhi0_ctrl";
328 function = "sdhi0";
329 power-source = <1800>;
330 };
331
332 sdhi2_pins: sd2 {
333 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
334 function = "sdhi2";
211 };
212
213 cs2000: clk-multiplier@4f {
214 #clock-cells = <0>;
215 compatible = "cirrus,cs2000-cp";
216 reg = <0x4f>;
217 clocks = <&audio_clkout>, <&x12_clk>;
218 clock-names = "clk_in", "ref_clk";

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324 groups = "sdhi0_data4", "sdhi0_ctrl";
325 function = "sdhi0";
326 power-source = <1800>;
327 };
328
329 sdhi2_pins: sd2 {
330 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
331 function = "sdhi2";
335 power-source = <3300>;
336 };
337
338 sdhi2_pins_uhs: sd2_uhs {
339 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
340 function = "sdhi2";
341 power-source = <1800>;
342 };
343
344 sound_pins: sound {
345 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
346 function = "ssi";
347 };
348

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385 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
386 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
387 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
388 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
389 <&audio_clk_a>, <&cs2000>,
390 <&audio_clk_c>,
391 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
392
332 power-source = <1800>;
333 };
334
335 sound_pins: sound {
336 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
337 function = "ssi";
338 };
339

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376 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
377 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
378 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
379 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
380 <&audio_clk_a>, <&cs2000>,
381 <&audio_clk_c>,
382 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
383
393 rcar_sound,dai {
394 dai0 {
395 playback = <&ssi0 &src0 &dvc0>;
396 capture = <&ssi1 &src1 &dvc1>;
384 ports {
385 rsnd_port0: port {
386 rsnd_for_ak4613: endpoint {
387 remote-endpoint = <&ak4613_endpoint>;
388
389 dai-format = "left_j";
390 bitclock-master = <&rsnd_for_ak4613>;
391 frame-master = <&rsnd_for_ak4613>;
392
393 playback = <&ssi0 &src0 &dvc0>;
394 capture = <&ssi1 &src1 &dvc1>;
395 };
397 };
398 };
399};
400
401&scif2 {
402 pinctrl-0 = <&scif2_pins>;
403 pinctrl-names = "default";
404

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421 sd-uhs-sdr50;
422 sd-uhs-sdr104;
423 status = "okay";
424};
425
426&sdhi2 {
427 /* used for on-board 8bit eMMC */
428 pinctrl-0 = <&sdhi2_pins>;
396 };
397 };
398};
399
400&scif2 {
401 pinctrl-0 = <&scif2_pins>;
402 pinctrl-names = "default";
403

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420 sd-uhs-sdr50;
421 sd-uhs-sdr104;
422 status = "okay";
423};
424
425&sdhi2 {
426 /* used for on-board 8bit eMMC */
427 pinctrl-0 = <&sdhi2_pins>;
429 pinctrl-1 = <&sdhi2_pins_uhs>;
428 pinctrl-1 = <&sdhi2_pins>;
430 pinctrl-names = "default", "state_uhs";
431
432 vmmc-supply = <&reg_3p3v>;
433 vqmmc-supply = <&reg_1p8v>;
434 bus-width = <8>;
435 mmc-hs200-1_8v;
436 non-removable;
437 status = "okay";

--- 17 unchanged lines hidden --- 		429 pinctrl-names = "default", "state_uhs";
430
431 vmmc-supply = <&reg_3p3v>;
432 vqmmc-supply = <&reg_1p8v>;
433 bus-width = <8>;
434 mmc-hs200-1_8v;
435 non-removable;
436 status = "okay";

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