ulcb.dtsi (36452b8ba02a62445847a29779dc581eb4cfeddd) ulcb.dtsi (822cecb1bef2bf41663d6c4e7786d9e159f72674)
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any

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26
27 audio_clkout: audio-clkout {
28 /*
29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
31 */
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any

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26
27 audio_clkout: audio-clkout {
28 /*
29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
31 */
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <11289600>;
34 clock-frequency = <12288000>;
35 };
36
37 hdmi0-out {
38 compatible = "hdmi-connector";
39 type = "a";
40
41 port {
42 hdmi0_con: endpoint {

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152 phy0: ethernet-phy@0 {
153 rxc-skew-ps = <1500>;
154 reg = <0>;
155 interrupt-parent = <&gpio2>;
156 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
157 };
158};
159
35 };
36
37 hdmi0-out {
38 compatible = "hdmi-connector";
39 type = "a";
40
41 port {
42 hdmi0_con: endpoint {

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152 phy0: ethernet-phy@0 {
153 rxc-skew-ps = <1500>;
154 reg = <0>;
155 interrupt-parent = <&gpio2>;
156 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
157 };
158};
159
160&du {
161 status = "okay";
162};
163
160&ehci1 {
161 status = "okay";
162};
163
164&extal_clk {
165 clock-frequency = <16666666>;
166};
167

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245};
246
247&pfc {
248 pinctrl-0 = <&scif_clk_pins>;
249 pinctrl-names = "default";
250
251 avb_pins: avb {
252 mux {
164&ehci1 {
165 status = "okay";
166};
167
168&extal_clk {
169 clock-frequency = <16666666>;
170};
171

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249};
250
251&pfc {
252 pinctrl-0 = <&scif_clk_pins>;
253 pinctrl-names = "default";
254
255 avb_pins: avb {
256 mux {
253 groups = "avb_link", "avb_phy_int", "avb_mdc",
254 "avb_mii";
257 groups = "avb_link", "avb_mdc", "avb_mii";
255 function = "avb";
256 };
257
258 pins_mdc {
259 groups = "avb_mdc";
260 drive-strength = <24>;
261 };
262

--- 156 unchanged lines hidden --- 		258 function = "avb";
259 };
260
261 pins_mdc {
262 groups = "avb_mdc";
263 drive-strength = <24>;
264 };
265

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