ulcb.dtsi (03ab8e6297acd1bc0eedaa050e2a1635c576fd11) ulcb.dtsi (5cf12ac9493ae2603e5ba27c1040a88c7b26dd28)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8

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71 led5 {
72 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
73 };
74 led6 {
75 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
76 };
77 };
78
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8

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71 led5 {
72 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
73 };
74 led6 {
75 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
76 };
77 };
78
79 reg_1p8v: regulator0 {
79 reg_1p8v: regulator-1p8v {
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-1.8V";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84 regulator-boot-on;
85 regulator-always-on;
86 };
87
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-1.8V";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84 regulator-boot-on;
85 regulator-always-on;
86 };
87
88 reg_3p3v: regulator1 {
88 reg_3p3v: regulator-3p3v {
89 compatible = "regulator-fixed";
90 regulator-name = "fixed-3.3V";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 regulator-boot-on;
94 regulator-always-on;
95 };
96

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421 bitclock-master;
422 frame-master;
423 playback = <&ssi2>;
424 };
425 };
426 };
427};
428
89 compatible = "regulator-fixed";
90 regulator-name = "fixed-3.3V";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 regulator-boot-on;
94 regulator-always-on;
95 };
96

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421 bitclock-master;
422 frame-master;
423 playback = <&ssi2>;
424 };
425 };
426 };
427};
428
429&rpc {
430 /* Left disabled. To be enabled by firmware when unlocked. */
431
432 flash@0 {
433 compatible = "cypress,hyperflash", "cfi-flash";
434 reg = <0>;
435
436 partitions {
437 compatible = "fixed-partitions";
438 #address-cells = <1>;
439 #size-cells = <1>;
440
441 bootparam@0 {
442 reg = <0x00000000 0x040000>;
443 read-only;
444 };
445 bl2@40000 {
446 reg = <0x00040000 0x140000>;
447 read-only;
448 };
449 cert_header_sa6@180000 {
450 reg = <0x00180000 0x040000>;
451 read-only;
452 };
453 bl31@1c0000 {
454 reg = <0x001c0000 0x040000>;
455 read-only;
456 };
457 tee@200000 {
458 reg = <0x00200000 0x440000>;
459 read-only;
460 };
461 uboot@640000 {
462 reg = <0x00640000 0x100000>;
463 read-only;
464 };
465 dtb@740000 {
466 reg = <0x00740000 0x080000>;
467 };
468 kernel@7c0000 {
469 reg = <0x007c0000 0x1400000>;
470 };
471 user@1bc0000 {
472 reg = <0x01bc0000 0x2440000>;
473 };
474 };
475 };
476};
477
429&rwdt {
430 timeout-sec = <60>;
431 status = "okay";
432};
433
434&scif2 {
435 pinctrl-0 = <&scif2_pins>;
436 pinctrl-names = "default";

--- 50 unchanged lines hidden --- 		478&rwdt {
479 timeout-sec = <60>;
480 status = "okay";
481};
482
483&scif2 {
484 pinctrl-0 = <&scif2_pins>;
485 pinctrl-names = "default";

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