r8a77995.dtsi (03abfdd31c66f0ecd629a1d1362e87551ce6c027) r8a77995.dtsi (a582013b7b1a6fbe9e896b5686887bc804800fe0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
7 */
8

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384 interrupt-names = "ch0", "ch1";
385 clocks = <&cpg CPG_MOD 331>;
386 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
387 resets = <&cpg 331>;
388 #dma-cells = <1>;
389 dma-channels = <2>;
390 };
391
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
7 */
8

--- 375 unchanged lines hidden (view full) ---

384 interrupt-names = "ch0", "ch1";
385 clocks = <&cpg CPG_MOD 331>;
386 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
387 resets = <&cpg 331>;
388 #dma-cells = <1>;
389 dma-channels = <2>;
390 };
391
392 arm_cc630p: crypto@e6601000 {
393 compatible = "arm,cryptocell-630p-ree";
394 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
395 reg = <0x0 0xe6601000 0 0x1000>;
396 clocks = <&cpg CPG_MOD 229>;
397 resets = <&cpg 229>;
398 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
399 };
400
392 canfd: can@e66c0000 {
393 compatible = "renesas,r8a77995-canfd",
394 "renesas,rcar-gen3-canfd";
395 reg = <0 0xe66c0000 0 0x8000>;
396 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
397 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
398 clocks = <&cpg CPG_MOD 914>,
399 <&cpg CPG_CORE R8A77995_CLK_CANFD>,

--- 746 unchanged lines hidden --- 		401 canfd: can@e66c0000 {
402 compatible = "renesas,r8a77995-canfd",
403 "renesas,rcar-gen3-canfd";
404 reg = <0 0xe66c0000 0 0x8000>;
405 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 914>,
408 <&cpg CPG_CORE R8A77995_CLK_CANFD>,

--- 746 unchanged lines hidden ---