r8a77990.dtsi (e42f6f9be4f83c537aa81b4c6239ea94ff5b29ce) r8a77990.dtsi (180485566d41531c64a57e9253d38a1ac55bc387)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the r8a77990 SoC
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/renesas-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
11

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332 power-domains = <&sysc 32>;
333 resets = <&cpg 812>;
334 phy-mode = "rgmii";
335 #address-cells = <1>;
336 #size-cells = <0>;
337 status = "disabled";
338 };
339
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/renesas-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
11

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332 power-domains = <&sysc 32>;
333 resets = <&cpg 812>;
334 phy-mode = "rgmii";
335 #address-cells = <1>;
336 #size-cells = <0>;
337 status = "disabled";
338 };
339
340 pwm0: pwm@e6e30000 {
341 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
342 reg = <0 0xe6e30000 0 0x8>;
343 clocks = <&cpg CPG_MOD 523>;
344 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
345 resets = <&cpg 523>;
346 #pwm-cells = <2>;
347 status = "disabled";
348 };
349
350 pwm1: pwm@e6e31000 {
351 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
352 reg = <0 0xe6e31000 0 0x8>;
353 clocks = <&cpg CPG_MOD 523>;
354 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
355 resets = <&cpg 523>;
356 #pwm-cells = <2>;
357 status = "disabled";
358 };
359
360 pwm2: pwm@e6e32000 {
361 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
362 reg = <0 0xe6e32000 0 0x8>;
363 clocks = <&cpg CPG_MOD 523>;
364 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
365 resets = <&cpg 523>;
366 #pwm-cells = <2>;
367 status = "disabled";
368 };
369
370 pwm3: pwm@e6e33000 {
371 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
372 reg = <0 0xe6e33000 0 0x8>;
373 clocks = <&cpg CPG_MOD 523>;
374 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
375 resets = <&cpg 523>;
376 #pwm-cells = <2>;
377 status = "disabled";
378 };
379
380 pwm4: pwm@e6e34000 {
381 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
382 reg = <0 0xe6e34000 0 0x8>;
383 clocks = <&cpg CPG_MOD 523>;
384 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
385 resets = <&cpg 523>;
386 #pwm-cells = <2>;
387 status = "disabled";
388 };
389
390 pwm5: pwm@e6e35000 {
391 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
392 reg = <0 0xe6e35000 0 0x8>;
393 clocks = <&cpg CPG_MOD 523>;
394 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
395 resets = <&cpg 523>;
396 #pwm-cells = <2>;
397 status = "disabled";
398 };
399
400 pwm6: pwm@e6e36000 {
401 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
402 reg = <0 0xe6e36000 0 0x8>;
403 clocks = <&cpg CPG_MOD 523>;
404 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
405 resets = <&cpg 523>;
406 #pwm-cells = <2>;
407 status = "disabled";
408 };
409
340 scif2: serial@e6e88000 {
341 compatible = "renesas,scif-r8a77990",
342 "renesas,rcar-gen3-scif", "renesas,scif";
343 reg = <0 0xe6e88000 0 64>;
344 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
345 clocks = <&cpg CPG_MOD 310>;
346 clock-names = "fck";
347 power-domains = <&sysc 32>;

--- 83 unchanged lines hidden --- 		410 scif2: serial@e6e88000 {
411 compatible = "renesas,scif-r8a77990",
412 "renesas,rcar-gen3-scif", "renesas,scif";
413 reg = <0 0xe6e88000 0 64>;
414 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
415 clocks = <&cpg CPG_MOD 310>;
416 clock-names = "fck";
417 power-domains = <&sysc 32>;

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