r8a77990.dtsi (9c3a985f88fa4de82bf4bda906095ce6444e9039) r8a77990.dtsi (86d904b6ef9f5e67a28e0a0bb58df898c08ae0b8)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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1865 #address-cells = <3>;
1866 #size-cells = <2>;
1867 bus-range = <0x00 0xff>;
1868 device_type = "pci";
1869 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1870 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1871 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1872 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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1865 #address-cells = <3>;
1866 #size-cells = <2>;
1867 bus-range = <0x00 0xff>;
1868 device_type = "pci";
1869 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1870 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1871 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1872 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1873 /* Map all possible DDR as inbound ranges */
1874 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1873 /* Map all possible DDR/IOMMU as inbound ranges */
1874 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1875 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1876 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1877 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1878 #interrupt-cells = <1>;
1879 interrupt-map-mask = <0 0 0 0>;
1880 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1881 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1882 clock-names = "pcie", "pcie_bus";
1883 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1884 resets = <&cpg 319>;
1875 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1876 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1877 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1878 #interrupt-cells = <1>;
1879 interrupt-map-mask = <0 0 0 0>;
1880 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1881 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1882 clock-names = "pcie", "pcie_bus";
1883 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1884 resets = <&cpg 319>;
1885 iommu-map = <0 &ipmmu_hc 0 1>;
1886 iommu-map-mask = <0>;
1885 status = "disabled";
1886 };
1887
1888 vspb0: vsp@fe960000 {
1889 compatible = "renesas,vsp2";
1890 reg = <0 0xfe960000 0 0x8000>;
1891 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1892 clocks = <&cpg CPG_MOD 626>;

--- 260 unchanged lines hidden --- 		1887 status = "disabled";
1888 };
1889
1890 vspb0: vsp@fe960000 {
1891 compatible = "renesas,vsp2";
1892 reg = <0 0xfe960000 0 0x8000>;
1893 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1894 clocks = <&cpg CPG_MOD 626>;

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