r8a77990.dtsi (98817a84ff1c755c347ac633ff017a623a631fad) r8a77990.dtsi (a6cb262af1e1adfa6287cb43f09021ee42beb21c)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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1590 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1591 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1592 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1593 resets = <&cpg 703>, <&cpg 704>;
1594 #phy-cells = <1>;
1595 status = "disabled";
1596 };
1597
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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1590 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1591 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1592 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1593 resets = <&cpg 703>, <&cpg 704>;
1594 #phy-cells = <1>;
1595 status = "disabled";
1596 };
1597
1598 sdhi0: sd@ee100000 {
1598 sdhi0: mmc@ee100000 {
1599 compatible = "renesas,sdhi-r8a77990",
1600 "renesas,rcar-gen3-sdhi";
1601 reg = <0 0xee100000 0 0x2000>;
1602 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1603 clocks = <&cpg CPG_MOD 314>;
1604 max-frequency = <200000000>;
1605 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1606 resets = <&cpg 314>;
1607 iommus = <&ipmmu_ds1 32>;
1608 status = "disabled";
1609 };
1610
1599 compatible = "renesas,sdhi-r8a77990",
1600 "renesas,rcar-gen3-sdhi";
1601 reg = <0 0xee100000 0 0x2000>;
1602 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1603 clocks = <&cpg CPG_MOD 314>;
1604 max-frequency = <200000000>;
1605 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1606 resets = <&cpg 314>;
1607 iommus = <&ipmmu_ds1 32>;
1608 status = "disabled";
1609 };
1610
1611 sdhi1: sd@ee120000 {
1611 sdhi1: mmc@ee120000 {
1612 compatible = "renesas,sdhi-r8a77990",
1613 "renesas,rcar-gen3-sdhi";
1614 reg = <0 0xee120000 0 0x2000>;
1615 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1616 clocks = <&cpg CPG_MOD 313>;
1617 max-frequency = <200000000>;
1618 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1619 resets = <&cpg 313>;
1620 iommus = <&ipmmu_ds1 33>;
1621 status = "disabled";
1622 };
1623
1612 compatible = "renesas,sdhi-r8a77990",
1613 "renesas,rcar-gen3-sdhi";
1614 reg = <0 0xee120000 0 0x2000>;
1615 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1616 clocks = <&cpg CPG_MOD 313>;
1617 max-frequency = <200000000>;
1618 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1619 resets = <&cpg 313>;
1620 iommus = <&ipmmu_ds1 33>;
1621 status = "disabled";
1622 };
1623
1624 sdhi3: sd@ee160000 {
1624 sdhi3: mmc@ee160000 {
1625 compatible = "renesas,sdhi-r8a77990",
1626 "renesas,rcar-gen3-sdhi";
1627 reg = <0 0xee160000 0 0x2000>;
1628 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1629 clocks = <&cpg CPG_MOD 311>;
1630 max-frequency = <200000000>;
1631 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1632 resets = <&cpg 311>;

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1625 compatible = "renesas,sdhi-r8a77990",
1626 "renesas,rcar-gen3-sdhi";
1627 reg = <0 0xee160000 0 0x2000>;
1628 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1629 clocks = <&cpg CPG_MOD 311>;
1630 max-frequency = <200000000>;
1631 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1632 resets = <&cpg 311>;

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