r8a77990.dtsi (8517042060b55a37c1b7d3cbb04e131bfe61c13a) r8a77990.dtsi (a5ebe5e49a862e21c620656d2dc244a0d92833d9)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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674 reg = <0 0xe6e36000 0 0x8>;
675 clocks = <&cpg CPG_MOD 523>;
676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
677 resets = <&cpg 523>;
678 #pwm-cells = <2>;
679 status = "disabled";
680 };
681
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

--- 665 unchanged lines hidden (view full) ---

674 reg = <0 0xe6e36000 0 0x8>;
675 clocks = <&cpg CPG_MOD 523>;
676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
677 resets = <&cpg 523>;
678 #pwm-cells = <2>;
679 status = "disabled";
680 };
681
682 scif0: serial@e6e60000 {
683 compatible = "renesas,scif-r8a77990",
684 "renesas,rcar-gen3-scif", "renesas,scif";
685 reg = <0 0xe6e60000 0 64>;
686 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
687 clocks = <&cpg CPG_MOD 207>,
688 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
689 <&scif_clk>;
690 clock-names = "fck", "brg_int", "scif_clk";
691 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
692 <&dmac2 0x51>, <&dmac2 0x50>;
693 dma-names = "tx", "rx", "tx", "rx";
694 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
695 resets = <&cpg 207>;
696 status = "disabled";
697 };
698
699 scif1: serial@e6e68000 {
700 compatible = "renesas,scif-r8a77990",
701 "renesas,rcar-gen3-scif", "renesas,scif";
702 reg = <0 0xe6e68000 0 64>;
703 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
704 clocks = <&cpg CPG_MOD 206>,
705 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
706 <&scif_clk>;
707 clock-names = "fck", "brg_int", "scif_clk";
708 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
709 <&dmac2 0x53>, <&dmac2 0x52>;
710 dma-names = "tx", "rx", "tx", "rx";
711 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
712 resets = <&cpg 206>;
713 status = "disabled";
714 };
715
682 scif2: serial@e6e88000 {
683 compatible = "renesas,scif-r8a77990",
684 "renesas,rcar-gen3-scif", "renesas,scif";
685 reg = <0 0xe6e88000 0 64>;
686 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
687 clocks = <&cpg CPG_MOD 310>,
688 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
689 <&scif_clk>;
690 clock-names = "fck", "brg_int", "scif_clk";
691
692 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
693 resets = <&cpg 310>;
694 status = "disabled";
695 };
696
716 scif2: serial@e6e88000 {
717 compatible = "renesas,scif-r8a77990",
718 "renesas,rcar-gen3-scif", "renesas,scif";
719 reg = <0 0xe6e88000 0 64>;
720 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
721 clocks = <&cpg CPG_MOD 310>,
722 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
723 <&scif_clk>;
724 clock-names = "fck", "brg_int", "scif_clk";
725
726 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
727 resets = <&cpg 310>;
728 status = "disabled";
729 };
730
731 scif3: serial@e6c50000 {
732 compatible = "renesas,scif-r8a77990",
733 "renesas,rcar-gen3-scif", "renesas,scif";
734 reg = <0 0xe6c50000 0 64>;
735 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
736 clocks = <&cpg CPG_MOD 204>,
737 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
738 <&scif_clk>;
739 clock-names = "fck", "brg_int", "scif_clk";
740 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
741 dma-names = "tx", "rx";
742 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
743 resets = <&cpg 204>;
744 status = "disabled";
745 };
746
747 scif4: serial@e6c40000 {
748 compatible = "renesas,scif-r8a77990",
749 "renesas,rcar-gen3-scif", "renesas,scif";
750 reg = <0 0xe6c40000 0 64>;
751 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
752 clocks = <&cpg CPG_MOD 203>,
753 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
754 <&scif_clk>;
755 clock-names = "fck", "brg_int", "scif_clk";
756 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
757 dma-names = "tx", "rx";
758 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
759 resets = <&cpg 203>;
760 status = "disabled";
761 };
762
763 scif5: serial@e6f30000 {
764 compatible = "renesas,scif-r8a77990",
765 "renesas,rcar-gen3-scif", "renesas,scif";
766 reg = <0 0xe6f30000 0 64>;
767 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
768 clocks = <&cpg CPG_MOD 202>,
769 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
770 <&scif_clk>;
771 clock-names = "fck", "brg_int", "scif_clk";
772 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
773 <&dmac2 0x5b>, <&dmac2 0x5a>;
774 dma-names = "tx", "rx", "tx", "rx";
775 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
776 resets = <&cpg 202>;
777 status = "disabled";
778 };
779
697 msiof0: spi@e6e90000 {
698 compatible = "renesas,msiof-r8a77990",
699 "renesas,rcar-gen3-msiof";
700 reg = <0 0xe6e90000 0 0x0064>;
701 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&cpg CPG_MOD 211>;
703 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
704 <&dmac2 0x41>, <&dmac2 0x40>;

--- 379 unchanged lines hidden --- 		780 msiof0: spi@e6e90000 {
781 compatible = "renesas,msiof-r8a77990",
782 "renesas,rcar-gen3-msiof";
783 reg = <0 0xe6e90000 0 0x0064>;
784 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
785 clocks = <&cpg CPG_MOD 211>;
786 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
787 <&dmac2 0x41>, <&dmac2 0x40>;

--- 379 unchanged lines hidden ---