r8a77990.dtsi (2bc0aa18ee9f34613876f6ac7bf944ad65d63e17) r8a77990.dtsi (f191fba76916dc18c41cf6183d71dbf9a1d821c8)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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1833 clock-names = "core", "clkh";
1834 max-frequency = <200000000>;
1835 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1836 resets = <&cpg 311>;
1837 iommus = <&ipmmu_ds1 35>;
1838 status = "disabled";
1839 };
1840
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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1833 clock-names = "core", "clkh";
1834 max-frequency = <200000000>;
1835 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1836 resets = <&cpg 311>;
1837 iommus = <&ipmmu_ds1 35>;
1838 status = "disabled";
1839 };
1840
1841 rpc: spi@ee200000 {
1842 compatible = "renesas,r8a77990-rpc-if",
1843 "renesas,rcar-gen3-rpc-if";
1844 reg = <0 0xee200000 0 0x200>,
1845 <0 0x08000000 0 0x04000000>,
1846 <0 0xee208000 0 0x100>;
1847 reg-names = "regs", "dirmap", "wbuf";
1848 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1849 clocks = <&cpg CPG_MOD 917>;
1850 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1851 resets = <&cpg 917>;
1852 #address-cells = <1>;
1853 #size-cells = <0>;
1854 status = "disabled";
1855 };
1856
1841 gic: interrupt-controller@f1010000 {
1842 compatible = "arm,gic-400";
1843 #interrupt-cells = <3>;
1844 #address-cells = <0>;
1845 interrupt-controller;
1846 reg = <0x0 0xf1010000 0 0x1000>,
1847 <0x0 0xf1020000 0 0x20000>,
1848 <0x0 0xf1040000 0 0x20000>,

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1857 gic: interrupt-controller@f1010000 {
1858 compatible = "arm,gic-400";
1859 #interrupt-cells = <3>;
1860 #address-cells = <0>;
1861 interrupt-controller;
1862 reg = <0x0 0xf1010000 0 0x1000>,
1863 <0x0 0xf1020000 0 0x20000>,
1864 <0x0 0xf1040000 0 0x20000>,

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