r8a77990.dtsi (281a94b0f2f0775a2b7825c18bccf7e4c922b7b3) r8a77990.dtsi (4e4c17c6c3907dfc34051cc450a78a38fb371b4f)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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415 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&cpg CPG_MOD 407>;
419 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
420 resets = <&cpg 407>;
421 };
422
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>

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415 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&cpg CPG_MOD 407>;
419 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
420 resets = <&cpg 407>;
421 };
422
423 tmu0: timer@e61e0000 {
424 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
425 reg = <0 0xe61e0000 0 0x30>;
426 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
427 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
428 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
429 clocks = <&cpg CPG_MOD 125>;
430 clock-names = "fck";
431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
432 resets = <&cpg 125>;
433 status = "disabled";
434 };
435
436 tmu1: timer@e6fc0000 {
437 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
438 reg = <0 0xe6fc0000 0 0x30>;
439 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
441 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
442 clocks = <&cpg CPG_MOD 124>;
443 clock-names = "fck";
444 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
445 resets = <&cpg 124>;
446 status = "disabled";
447 };
448
449 tmu2: timer@e6fd0000 {
450 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
451 reg = <0 0xe6fd0000 0 0x30>;
452 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
453 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
455 clocks = <&cpg CPG_MOD 123>;
456 clock-names = "fck";
457 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
458 resets = <&cpg 123>;
459 status = "disabled";
460 };
461
462 tmu3: timer@e6fe0000 {
463 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
464 reg = <0 0xe6fe0000 0 0x30>;
465 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
466 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
467 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
468 clocks = <&cpg CPG_MOD 122>;
469 clock-names = "fck";
470 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
471 resets = <&cpg 122>;
472 status = "disabled";
473 };
474
475 tmu4: timer@ffc00000 {
476 compatible = "renesas,tmu-r8a77990", "renesas,tmu";
477 reg = <0 0xffc00000 0 0x30>;
478 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&cpg CPG_MOD 121>;
482 clock-names = "fck";
483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
484 resets = <&cpg 121>;
485 status = "disabled";
486 };
487
423 i2c0: i2c@e6500000 {
424 #address-cells = <1>;
425 #size-cells = <0>;
426 compatible = "renesas,i2c-r8a77990",
427 "renesas,rcar-gen3-i2c";
428 reg = <0 0xe6500000 0 0x40>;
429 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
430 clocks = <&cpg CPG_MOD 931>;

--- 1637 unchanged lines hidden --- 		488 i2c0: i2c@e6500000 {
489 #address-cells = <1>;
490 #size-cells = <0>;
491 compatible = "renesas,i2c-r8a77990",
492 "renesas,rcar-gen3-i2c";
493 reg = <0 0xe6500000 0 0x40>;
494 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&cpg CPG_MOD 931>;

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