r8a77990.dtsi (180485566d41531c64a57e9253d38a1ac55bc387) r8a77990.dtsi (83e7d2ec0d7bd57666c6f8fd210255e0ec155c38)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/renesas-cpg-mssr.h>
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
11
12/ {
13 compatible = "renesas,r8a77990";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 a53_0: cpu@0 {
22 compatible = "arm,cortex-a53", "arm,armv8";
23 reg = <0>;
24 device_type = "cpu";
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
11
12/ {
13 compatible = "renesas,r8a77990";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 a53_0: cpu@0 {
22 compatible = "arm,cortex-a53", "arm,armv8";
23 reg = <0>;
24 device_type = "cpu";
25 power-domains = <&sysc 5>;
25 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
26 next-level-cache = <&L2_CA53>;
27 enable-method = "psci";
28 };
29
30 a53_1: cpu@1 {
31 compatible = "arm,cortex-a53", "arm,armv8";
32 reg = <1>;
33 device_type = "cpu";
26 next-level-cache = <&L2_CA53>;
27 enable-method = "psci";
28 };
29
30 a53_1: cpu@1 {
31 compatible = "arm,cortex-a53", "arm,armv8";
32 reg = <1>;
33 device_type = "cpu";
34 power-domains = <&sysc 6>;
34 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
35 next-level-cache = <&L2_CA53>;
36 enable-method = "psci";
37 };
38
39 L2_CA53: cache-controller-0 {
40 compatible = "cache";
35 next-level-cache = <&L2_CA53>;
36 enable-method = "psci";
37 };
38
39 L2_CA53: cache-controller-0 {
40 compatible = "cache";
41 power-domains = <&sysc 21>;
41 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
42 cache-unified;
43 cache-level = <2>;
44 };
45 };
46
47 extal_clk: extal {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;

--- 20 unchanged lines hidden (view full) ---

70 #size-cells = <2>;
71 ranges;
72
73 rwdt: watchdog@e6020000 {
74 compatible = "renesas,r8a77990-wdt",
75 "renesas,rcar-gen3-wdt";
76 reg = <0 0xe6020000 0 0x0c>;
77 clocks = <&cpg CPG_MOD 402>;
42 cache-unified;
43 cache-level = <2>;
44 };
45 };
46
47 extal_clk: extal {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;

--- 20 unchanged lines hidden (view full) ---

70 #size-cells = <2>;
71 ranges;
72
73 rwdt: watchdog@e6020000 {
74 compatible = "renesas,r8a77990-wdt",
75 "renesas,rcar-gen3-wdt";
76 reg = <0 0xe6020000 0 0x0c>;
77 clocks = <&cpg CPG_MOD 402>;
78 power-domains = <&sysc 32>;
78 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
79 resets = <&cpg 402>;
80 status = "disabled";
81 };
82
83 gpio0: gpio@e6050000 {
84 compatible = "renesas,gpio-r8a77990",
85 "renesas,rcar-gen3-gpio";
86 reg = <0 0xe6050000 0 0x50>;
87 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
88 #gpio-cells = <2>;
89 gpio-controller;
90 gpio-ranges = <&pfc 0 0 18>;
91 #interrupt-cells = <2>;
92 interrupt-controller;
93 clocks = <&cpg CPG_MOD 912>;
79 resets = <&cpg 402>;
80 status = "disabled";
81 };
82
83 gpio0: gpio@e6050000 {
84 compatible = "renesas,gpio-r8a77990",
85 "renesas,rcar-gen3-gpio";
86 reg = <0 0xe6050000 0 0x50>;
87 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
88 #gpio-cells = <2>;
89 gpio-controller;
90 gpio-ranges = <&pfc 0 0 18>;
91 #interrupt-cells = <2>;
92 interrupt-controller;
93 clocks = <&cpg CPG_MOD 912>;
94 power-domains = <&sysc 32>;
94 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
95 resets = <&cpg 912>;
96 };
97
98 gpio1: gpio@e6051000 {
99 compatible = "renesas,gpio-r8a77990",
100 "renesas,rcar-gen3-gpio";
101 reg = <0 0xe6051000 0 0x50>;
102 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
103 #gpio-cells = <2>;
104 gpio-controller;
105 gpio-ranges = <&pfc 0 32 23>;
106 #interrupt-cells = <2>;
107 interrupt-controller;
108 clocks = <&cpg CPG_MOD 911>;
95 resets = <&cpg 912>;
96 };
97
98 gpio1: gpio@e6051000 {
99 compatible = "renesas,gpio-r8a77990",
100 "renesas,rcar-gen3-gpio";
101 reg = <0 0xe6051000 0 0x50>;
102 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
103 #gpio-cells = <2>;
104 gpio-controller;
105 gpio-ranges = <&pfc 0 32 23>;
106 #interrupt-cells = <2>;
107 interrupt-controller;
108 clocks = <&cpg CPG_MOD 911>;
109 power-domains = <&sysc 32>;
109 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
110 resets = <&cpg 911>;
111 };
112
113 gpio2: gpio@e6052000 {
114 compatible = "renesas,gpio-r8a77990",
115 "renesas,rcar-gen3-gpio";
116 reg = <0 0xe6052000 0 0x50>;
117 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
118 #gpio-cells = <2>;
119 gpio-controller;
120 gpio-ranges = <&pfc 0 64 26>;
121 #interrupt-cells = <2>;
122 interrupt-controller;
123 clocks = <&cpg CPG_MOD 910>;
110 resets = <&cpg 911>;
111 };
112
113 gpio2: gpio@e6052000 {
114 compatible = "renesas,gpio-r8a77990",
115 "renesas,rcar-gen3-gpio";
116 reg = <0 0xe6052000 0 0x50>;
117 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
118 #gpio-cells = <2>;
119 gpio-controller;
120 gpio-ranges = <&pfc 0 64 26>;
121 #interrupt-cells = <2>;
122 interrupt-controller;
123 clocks = <&cpg CPG_MOD 910>;
124 power-domains = <&sysc 32>;
124 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
125 resets = <&cpg 910>;
126 };
127
128 gpio3: gpio@e6053000 {
129 compatible = "renesas,gpio-r8a77990",
130 "renesas,rcar-gen3-gpio";
131 reg = <0 0xe6053000 0 0x50>;
132 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
133 #gpio-cells = <2>;
134 gpio-controller;
135 gpio-ranges = <&pfc 0 96 16>;
136 #interrupt-cells = <2>;
137 interrupt-controller;
138 clocks = <&cpg CPG_MOD 909>;
125 resets = <&cpg 910>;
126 };
127
128 gpio3: gpio@e6053000 {
129 compatible = "renesas,gpio-r8a77990",
130 "renesas,rcar-gen3-gpio";
131 reg = <0 0xe6053000 0 0x50>;
132 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
133 #gpio-cells = <2>;
134 gpio-controller;
135 gpio-ranges = <&pfc 0 96 16>;
136 #interrupt-cells = <2>;
137 interrupt-controller;
138 clocks = <&cpg CPG_MOD 909>;
139 power-domains = <&sysc 32>;
139 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
140 resets = <&cpg 909>;
141 };
142
143 gpio4: gpio@e6054000 {
144 compatible = "renesas,gpio-r8a77990",
145 "renesas,rcar-gen3-gpio";
146 reg = <0 0xe6054000 0 0x50>;
147 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
148 #gpio-cells = <2>;
149 gpio-controller;
150 gpio-ranges = <&pfc 0 128 11>;
151 #interrupt-cells = <2>;
152 interrupt-controller;
153 clocks = <&cpg CPG_MOD 908>;
140 resets = <&cpg 909>;
141 };
142
143 gpio4: gpio@e6054000 {
144 compatible = "renesas,gpio-r8a77990",
145 "renesas,rcar-gen3-gpio";
146 reg = <0 0xe6054000 0 0x50>;
147 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
148 #gpio-cells = <2>;
149 gpio-controller;
150 gpio-ranges = <&pfc 0 128 11>;
151 #interrupt-cells = <2>;
152 interrupt-controller;
153 clocks = <&cpg CPG_MOD 908>;
154 power-domains = <&sysc 32>;
154 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
155 resets = <&cpg 908>;
156 };
157
158 gpio5: gpio@e6055000 {
159 compatible = "renesas,gpio-r8a77990",
160 "renesas,rcar-gen3-gpio";
161 reg = <0 0xe6055000 0 0x50>;
162 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
163 #gpio-cells = <2>;
164 gpio-controller;
165 gpio-ranges = <&pfc 0 160 20>;
166 #interrupt-cells = <2>;
167 interrupt-controller;
168 clocks = <&cpg CPG_MOD 907>;
155 resets = <&cpg 908>;
156 };
157
158 gpio5: gpio@e6055000 {
159 compatible = "renesas,gpio-r8a77990",
160 "renesas,rcar-gen3-gpio";
161 reg = <0 0xe6055000 0 0x50>;
162 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
163 #gpio-cells = <2>;
164 gpio-controller;
165 gpio-ranges = <&pfc 0 160 20>;
166 #interrupt-cells = <2>;
167 interrupt-controller;
168 clocks = <&cpg CPG_MOD 907>;
169 power-domains = <&sysc 32>;
169 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
170 resets = <&cpg 907>;
171 };
172
173 gpio6: gpio@e6055400 {
174 compatible = "renesas,gpio-r8a77990",
175 "renesas,rcar-gen3-gpio";
176 reg = <0 0xe6055400 0 0x50>;
177 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
178 #gpio-cells = <2>;
179 gpio-controller;
180 gpio-ranges = <&pfc 0 192 18>;
181 #interrupt-cells = <2>;
182 interrupt-controller;
183 clocks = <&cpg CPG_MOD 906>;
170 resets = <&cpg 907>;
171 };
172
173 gpio6: gpio@e6055400 {
174 compatible = "renesas,gpio-r8a77990",
175 "renesas,rcar-gen3-gpio";
176 reg = <0 0xe6055400 0 0x50>;
177 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
178 #gpio-cells = <2>;
179 gpio-controller;
180 gpio-ranges = <&pfc 0 192 18>;
181 #interrupt-cells = <2>;
182 interrupt-controller;
183 clocks = <&cpg CPG_MOD 906>;
184 power-domains = <&sysc 32>;
184 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
185 resets = <&cpg 906>;
186 };
187
188 pfc: pin-controller@e6060000 {
189 compatible = "renesas,pfc-r8a77990";
190 reg = <0 0xe6060000 0 0x508>;
191 };
192

--- 131 unchanged lines hidden (view full) ---

324 interrupt-names = "ch0", "ch1", "ch2", "ch3",
325 "ch4", "ch5", "ch6", "ch7",
326 "ch8", "ch9", "ch10", "ch11",
327 "ch12", "ch13", "ch14", "ch15",
328 "ch16", "ch17", "ch18", "ch19",
329 "ch20", "ch21", "ch22", "ch23",
330 "ch24";
331 clocks = <&cpg CPG_MOD 812>;
185 resets = <&cpg 906>;
186 };
187
188 pfc: pin-controller@e6060000 {
189 compatible = "renesas,pfc-r8a77990";
190 reg = <0 0xe6060000 0 0x508>;
191 };
192

--- 131 unchanged lines hidden (view full) ---

324 interrupt-names = "ch0", "ch1", "ch2", "ch3",
325 "ch4", "ch5", "ch6", "ch7",
326 "ch8", "ch9", "ch10", "ch11",
327 "ch12", "ch13", "ch14", "ch15",
328 "ch16", "ch17", "ch18", "ch19",
329 "ch20", "ch21", "ch22", "ch23",
330 "ch24";
331 clocks = <&cpg CPG_MOD 812>;
332 power-domains = <&sysc 32>;
332 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
333 resets = <&cpg 812>;
334 phy-mode = "rgmii";
335 #address-cells = <1>;
336 #size-cells = <0>;
337 status = "disabled";
338 };
339
340 pwm0: pwm@e6e30000 {

--- 68 unchanged lines hidden (view full) ---

409
410 scif2: serial@e6e88000 {
411 compatible = "renesas,scif-r8a77990",
412 "renesas,rcar-gen3-scif", "renesas,scif";
413 reg = <0 0xe6e88000 0 64>;
414 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
415 clocks = <&cpg CPG_MOD 310>;
416 clock-names = "fck";
333 resets = <&cpg 812>;
334 phy-mode = "rgmii";
335 #address-cells = <1>;
336 #size-cells = <0>;
337 status = "disabled";
338 };
339
340 pwm0: pwm@e6e30000 {

--- 68 unchanged lines hidden (view full) ---

409
410 scif2: serial@e6e88000 {
411 compatible = "renesas,scif-r8a77990",
412 "renesas,rcar-gen3-scif", "renesas,scif";
413 reg = <0 0xe6e88000 0 64>;
414 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
415 clocks = <&cpg CPG_MOD 310>;
416 clock-names = "fck";
417 power-domains = <&sysc 32>;
417 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
418 resets = <&cpg 310>;
419 status = "disabled";
420 };
421
422 xhci0: usb@ee000000 {
423 compatible = "renesas,xhci-r8a77990",
424 "renesas,rcar-gen3-xhci";
425 reg = <0 0xee000000 0 0xc00>;

--- 6 unchanged lines hidden (view full) ---

432
433 ohci0: usb@ee080000 {
434 compatible = "generic-ohci";
435 reg = <0 0xee080000 0 0x100>;
436 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&cpg CPG_MOD 703>;
438 phys = <&usb2_phy0>;
439 phy-names = "usb";
418 resets = <&cpg 310>;
419 status = "disabled";
420 };
421
422 xhci0: usb@ee000000 {
423 compatible = "renesas,xhci-r8a77990",
424 "renesas,rcar-gen3-xhci";
425 reg = <0 0xee000000 0 0xc00>;

--- 6 unchanged lines hidden (view full) ---

432
433 ohci0: usb@ee080000 {
434 compatible = "generic-ohci";
435 reg = <0 0xee080000 0 0x100>;
436 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&cpg CPG_MOD 703>;
438 phys = <&usb2_phy0>;
439 phy-names = "usb";
440 power-domains = <&sysc 32>;
440 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
441 resets = <&cpg 703>;
442 status = "disabled";
443 };
444
445 ehci0: usb@ee080100 {
446 compatible = "generic-ehci";
447 reg = <0 0xee080100 0 0x100>;
448 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
449 clocks = <&cpg CPG_MOD 703>;
450 phys = <&usb2_phy0>;
451 phy-names = "usb";
452 companion = <&ohci0>;
441 resets = <&cpg 703>;
442 status = "disabled";
443 };
444
445 ehci0: usb@ee080100 {
446 compatible = "generic-ehci";
447 reg = <0 0xee080100 0 0x100>;
448 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
449 clocks = <&cpg CPG_MOD 703>;
450 phys = <&usb2_phy0>;
451 phy-names = "usb";
452 companion = <&ohci0>;
453 power-domains = <&sysc 32>;
453 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
454 resets = <&cpg 703>;
455 status = "disabled";
456 };
457
458 usb2_phy0: usb-phy@ee080200 {
459 compatible = "renesas,usb2-phy-r8a77990",
460 "renesas,rcar-gen3-usb2-phy";
461 reg = <0 0xee080200 0 0x700>;
462 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&cpg CPG_MOD 703>;
454 resets = <&cpg 703>;
455 status = "disabled";
456 };
457
458 usb2_phy0: usb-phy@ee080200 {
459 compatible = "renesas,usb2-phy-r8a77990",
460 "renesas,rcar-gen3-usb2-phy";
461 reg = <0 0xee080200 0 0x700>;
462 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&cpg CPG_MOD 703>;
464 power-domains = <&sysc 32>;
464 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
465 resets = <&cpg 703>;
466 #phy-cells = <0>;
467 status = "disabled";
468 };
469
470 gic: interrupt-controller@f1010000 {
471 compatible = "arm,gic-400";
472 #interrupt-cells = <3>;
473 #address-cells = <0>;
474 interrupt-controller;
475 reg = <0x0 0xf1010000 0 0x1000>,
476 <0x0 0xf1020000 0 0x20000>,
477 <0x0 0xf1040000 0 0x20000>,
478 <0x0 0xf1060000 0 0x20000>;
479 interrupts = <GIC_PPI 9
480 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
481 clocks = <&cpg CPG_MOD 408>;
482 clock-names = "clk";
465 resets = <&cpg 703>;
466 #phy-cells = <0>;
467 status = "disabled";
468 };
469
470 gic: interrupt-controller@f1010000 {
471 compatible = "arm,gic-400";
472 #interrupt-cells = <3>;
473 #address-cells = <0>;
474 interrupt-controller;
475 reg = <0x0 0xf1010000 0 0x1000>,
476 <0x0 0xf1020000 0 0x20000>,
477 <0x0 0xf1040000 0 0x20000>,
478 <0x0 0xf1060000 0 0x20000>;
479 interrupts = <GIC_PPI 9
480 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
481 clocks = <&cpg CPG_MOD 408>;
482 clock-names = "clk";
483 power-domains = <&sysc 32>;
483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
484 resets = <&cpg 408>;
485 };
486
487 prr: chipid@fff00044 {
488 compatible = "renesas,prr";
489 reg = <0 0xfff00044 0 4>;
490 };
491 };
492
493 timer {
494 compatible = "arm,armv8-timer";
495 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
496 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
497 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
498 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
499 };
500};
484 resets = <&cpg 408>;
485 };
486
487 prr: chipid@fff00044 {
488 compatible = "renesas,prr";
489 reg = <0 0xfff00044 0 4>;
490 };
491 };
492
493 timer {
494 compatible = "arm,armv8-timer";
495 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
496 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
497 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
498 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
499 };
500};