r8a77980.dtsi (cef7298262e9af841fb70d8673af45caf55300a1) r8a77980.dtsi (3c19b46a1f2416fa42ecbdbbc11b7122bdbd15d0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 1481 unchanged lines hidden (view full) ---

1490 compatible = "renesas,du-r8a77980",
1491 "renesas,du-r8a77970";
1492 reg = <0 0xfeb00000 0 0x80000>;
1493 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1494 clocks = <&cpg CPG_MOD 724>;
1495 clock-names = "du.0";
1496 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1497 resets = <&cpg 724>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 1481 unchanged lines hidden (view full) ---

1490 compatible = "renesas,du-r8a77980",
1491 "renesas,du-r8a77970";
1492 reg = <0 0xfeb00000 0 0x80000>;
1493 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1494 clocks = <&cpg CPG_MOD 724>;
1495 clock-names = "du.0";
1496 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1497 resets = <&cpg 724>;
1498 vsps = <&vspd0>;
1498 vsps = <&vspd0 0>;
1499 status = "disabled";
1500
1501 ports {
1502 #address-cells = <1>;
1503 #size-cells = <0>;
1504
1505 port@0 {
1506 reg = <0>;

--- 99 unchanged lines hidden --- 		1499 status = "disabled";
1500
1501 ports {
1502 #address-cells = <1>;
1503 #size-cells = <0>;
1504
1505 port@0 {
1506 reg = <0>;

--- 99 unchanged lines hidden ---