r8a77980.dtsi (9ddb236f13594b34a12dacf69a5adca7a1aef35e) r8a77980.dtsi (a2053990f3275e715d69c208d8c0040cac0df593)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 220 unchanged lines hidden (view full) ---

229 gpio-ranges = <&pfc 0 160 15>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
232 clocks = <&cpg CPG_MOD 907>;
233 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
234 resets = <&cpg 907>;
235 };
236
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 220 unchanged lines hidden (view full) ---

229 gpio-ranges = <&pfc 0 160 15>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
232 clocks = <&cpg CPG_MOD 907>;
233 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
234 resets = <&cpg 907>;
235 };
236
237 pfc: pin-controller@e6060000 {
237 pfc: pinctrl@e6060000 {
238 compatible = "renesas,pfc-r8a77980";
239 reg = <0 0xe6060000 0 0x50c>;
240 };
241
242 cmt0: timer@e60f0000 {
243 compatible = "renesas,r8a77980-cmt0",
244 "renesas,rcar-gen3-cmt0";
245 reg = <0 0xe60f0000 0 0x1004>;

--- 1377 unchanged lines hidden --- 		238 compatible = "renesas,pfc-r8a77980";
239 reg = <0 0xe6060000 0 0x50c>;
240 };
241
242 cmt0: timer@e60f0000 {
243 compatible = "renesas,r8a77980-cmt0",
244 "renesas,rcar-gen3-cmt0";
245 reg = <0 0xe60f0000 0 0x1004>;

--- 1377 unchanged lines hidden ---