r8a77980.dtsi (8e66f52288c18db46f4cdcf417cefaaafc6b8608) r8a77980.dtsi (03abfdd31c66f0ecd629a1d1362e87551ce6c027)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 1477 unchanged lines hidden (view full) ---

1486 du: display@feb00000 {
1487 compatible = "renesas,du-r8a77980";
1488 reg = <0 0xfeb00000 0 0x80000>;
1489 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1490 clocks = <&cpg CPG_MOD 724>;
1491 clock-names = "du.0";
1492 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1493 resets = <&cpg 724>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 1477 unchanged lines hidden (view full) ---

1486 du: display@feb00000 {
1487 compatible = "renesas,du-r8a77980";
1488 reg = <0 0xfeb00000 0 0x80000>;
1489 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1490 clocks = <&cpg CPG_MOD 724>;
1491 clock-names = "du.0";
1492 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1493 resets = <&cpg 724>;
1494 vsps = <&vspd0 0>;
1494 renesas,vsps = <&vspd0 0>;
1495
1495 status = "disabled";
1496
1497 ports {
1498 #address-cells = <1>;
1499 #size-cells = <0>;
1500
1501 port@0 {
1502 reg = <0>;

--- 99 unchanged lines hidden --- 		1496 status = "disabled";
1497
1498 ports {
1499 #address-cells = <1>;
1500 #size-cells = <0>;
1501
1502 port@0 {
1503 reg = <0>;

--- 99 unchanged lines hidden ---