r8a77980.dtsi (4f2c0a4acffbec01079c28f839422e64ddeff004) r8a77980.dtsi (86d904b6ef9f5e67a28e0a0bb58df898c08ae0b8)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

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1381 #address-cells = <3>;
1382 #size-cells = <2>;
1383 bus-range = <0x00 0xff>;
1384 device_type = "pci";
1385 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1386 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1387 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1388 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

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1381 #address-cells = <3>;
1382 #size-cells = <2>;
1383 bus-range = <0x00 0xff>;
1384 device_type = "pci";
1385 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1386 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1387 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1388 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1389 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1389 /* Map all possible DDR/IOMMU as inbound ranges */
1390 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1390 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1391 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1392 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1393 #interrupt-cells = <1>;
1394 interrupt-map-mask = <0 0 0 0>;
1395 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1396 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1397 clock-names = "pcie", "pcie_bus";
1398 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1399 resets = <&cpg 319>;
1400 phys = <&pcie_phy>;
1401 phy-names = "pcie";
1391 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1392 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1393 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1394 #interrupt-cells = <1>;
1395 interrupt-map-mask = <0 0 0 0>;
1396 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1397 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1398 clock-names = "pcie", "pcie_bus";
1399 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1400 resets = <&cpg 319>;
1401 phys = <&pcie_phy>;
1402 phy-names = "pcie";
1403 iommu-map = <0 &ipmmu_vi0 5 1>;
1404 iommu-map-mask = <0>;
1402 status = "disabled";
1403 };
1404
1405 vspd0: vsp@fea20000 {
1406 compatible = "renesas,vsp2";
1407 reg = <0 0xfea20000 0 0x5000>;
1408 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1409 clocks = <&cpg CPG_MOD 623>;

--- 213 unchanged lines hidden --- 		1405 status = "disabled";
1406 };
1407
1408 vspd0: vsp@fea20000 {
1409 compatible = "renesas,vsp2";
1410 reg = <0 0xfea20000 0 0x5000>;
1411 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1412 clocks = <&cpg CPG_MOD 623>;

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