r8a77980.dtsi (3182aa4e0bf4d0ee0b29fea4b5ca21290d6d6251) r8a77980.dtsi (ffa967e24c5817b48a3d5ecea2c12b9cdd807f0c)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 84 unchanged lines hidden (view full) ---

93
94 extalr_clk: extalr {
95 compatible = "fixed-clock";
96 #clock-cells = <0>;
97 /* This value must be overridden by the board */
98 clock-frequency = <0>;
99 };
100
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 84 unchanged lines hidden (view full) ---

93
94 extalr_clk: extalr {
95 compatible = "fixed-clock";
96 #clock-cells = <0>;
97 /* This value must be overridden by the board */
98 clock-frequency = <0>;
99 };
100
101 /* External PCIe clock - can be overridden by the board */
102 pcie_bus_clk: pcie_bus {
103 compatible = "fixed-clock";
104 #clock-cells = <0>;
105 clock-frequency = <0>;
106 };
107
101 pmu_a53 {
102 compatible = "arm,cortex-a53-pmu";
103 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
104 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
105 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
106 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
108 };

--- 323 unchanged lines hidden (view full) ---

432 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
433 <&dmac2 0x37>, <&dmac2 0x36>;
434 dma-names = "tx", "rx", "tx", "rx";
435 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
436 resets = <&cpg 517>;
437 status = "disabled";
438 };
439
108 pmu_a53 {
109 compatible = "arm,cortex-a53-pmu";
110 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
111 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
112 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
113 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
114 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
115 };

--- 323 unchanged lines hidden (view full) ---

439 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
440 <&dmac2 0x37>, <&dmac2 0x36>;
441 dma-names = "tx", "rx", "tx", "rx";
442 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
443 resets = <&cpg 517>;
444 status = "disabled";
445 };
446
447 pcie_phy: pcie-phy@e65d0000 {
448 compatible = "renesas,r8a77980-pcie-phy";
449 reg = <0 0xe65d0000 0 0x8000>;
450 #phy-cells = <0>;
451 clocks = <&cpg CPG_MOD 319>;
452 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
453 resets = <&cpg 319>;
454 status = "disabled";
455 };
456
440 canfd: can@e66c0000 {
441 compatible = "renesas,r8a77980-canfd",
442 "renesas,rcar-gen3-canfd";
443 reg = <0 0xe66c0000 0 0x8000>;
444 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
445 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
446 clocks = <&cpg CPG_MOD 914>,
447 <&cpg CPG_CORE R8A77980_CLK_CANFD>,

--- 594 unchanged lines hidden (view full) ---

1042 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1043 IRQ_TYPE_LEVEL_HIGH)>;
1044 clocks = <&cpg CPG_MOD 408>;
1045 clock-names = "clk";
1046 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1047 resets = <&cpg 408>;
1048 };
1049
457 canfd: can@e66c0000 {
458 compatible = "renesas,r8a77980-canfd",
459 "renesas,rcar-gen3-canfd";
460 reg = <0 0xe66c0000 0 0x8000>;
461 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&cpg CPG_MOD 914>,
464 <&cpg CPG_CORE R8A77980_CLK_CANFD>,

--- 594 unchanged lines hidden (view full) ---

1059 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1060 IRQ_TYPE_LEVEL_HIGH)>;
1061 clocks = <&cpg CPG_MOD 408>;
1062 clock-names = "clk";
1063 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1064 resets = <&cpg 408>;
1065 };
1066
1067 pciec: pcie@fe000000 {
1068 compatible = "renesas,pcie-r8a77980",
1069 "renesas,pcie-rcar-gen3";
1070 reg = <0 0xfe000000 0 0x80000>;
1071 #address-cells = <3>;
1072 #size-cells = <2>;
1073 bus-range = <0x00 0xff>;
1074 device_type = "pci";
1075 ranges = <
1076 0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000
1077 0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000
1078 0x02000000 0 0x30000000 0 0x30000000 0 0x8000000
1079 0x42000000 0 0x38000000 0 0x38000000 0 0x8000000
1080 >;
1081 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000
1082 0 0x80000000>;
1083 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1084 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1085 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1086 #interrupt-cells = <1>;
1087 interrupt-map-mask = <0 0 0 0>;
1088 interrupt-map = <0 0 0 0 &gic GIC_SPI 148
1089 IRQ_TYPE_LEVEL_HIGH>;
1090 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1091 clock-names = "pcie", "pcie_bus";
1092 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1093 resets = <&cpg 319>;
1094 phys = <&pcie_phy>;
1095 phy-names = "pcie";
1096 status = "disabled";
1097 };
1098
1050 vspd0: vsp@fea20000 {
1051 compatible = "renesas,vsp2";
1052 reg = <0 0xfea20000 0 0x5000>;
1053 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1054 clocks = <&cpg CPG_MOD 623>;
1055 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1056 resets = <&cpg 623>;
1057 renesas,fcp = <&fcpvd0>;

--- 165 unchanged lines hidden --- 		1099 vspd0: vsp@fea20000 {
1100 compatible = "renesas,vsp2";
1101 reg = <0 0xfea20000 0 0x5000>;
1102 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1103 clocks = <&cpg CPG_MOD 623>;
1104 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1105 resets = <&cpg 623>;
1106 renesas,fcp = <&fcpvd0>;

--- 165 unchanged lines hidden ---