r8a77980.dtsi (2f34a64aeac4d87e8ed8275d9f1230e18a50079c) r8a77980.dtsi (bcee502ceb6c0dcbc7ccd460ed7040c3d6998c3e)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77980 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

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113 soc {
114 compatible = "simple-bus";
115 interrupt-parent = <&gic>;
116
117 #address-cells = <2>;
118 #size-cells = <2>;
119 ranges;
120
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77980 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
7 */
8

--- 104 unchanged lines hidden (view full) ---

113 soc {
114 compatible = "simple-bus";
115 interrupt-parent = <&gic>;
116
117 #address-cells = <2>;
118 #size-cells = <2>;
119 ranges;
120
121 rwdt: watchdog@e6020000 {
122 compatible = "renesas,r8a77980-wdt",
123 "renesas,rcar-gen3-wdt";
124 reg = <0 0xe6020000 0 0x0c>;
125 clocks = <&cpg CPG_MOD 402>;
126 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
127 resets = <&cpg 402>;
128 status = "disabled";
129 };
130
121 gpio0: gpio@e6050000 {
122 compatible = "renesas,gpio-r8a77980",
123 "renesas,rcar-gen3-gpio";
124 reg = <0 0xe6050000 0 0x50>;
125 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
126 #gpio-cells = <2>;
127 gpio-controller;
128 gpio-ranges = <&pfc 0 0 22>;

--- 701 unchanged lines hidden --- 		131 gpio0: gpio@e6050000 {
132 compatible = "renesas,gpio-r8a77980",
133 "renesas,rcar-gen3-gpio";
134 reg = <0 0xe6050000 0 0x50>;
135 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
136 #gpio-cells = <2>;
137 gpio-controller;
138 gpio-ranges = <&pfc 0 0 22>;

--- 701 unchanged lines hidden ---