r8a77970.dtsi (cbfa278e20913a9b8380278149fa7e4068ea82e2) r8a77970.dtsi (c7a99343cc30704c1d173de9bbe06adaa5e96101)
1/*
2 * Device Tree Source for the r8a77970 SoC
3 *
4 * Copyright (C) 2016-2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any

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22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 };
29
1/*
2 * Device Tree Source for the r8a77970 SoC
3 *
4 * Copyright (C) 2016-2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any

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22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 };
29
30 psci {
31 compatible = "arm,psci-1.0", "arm,psci-0.2";
32 method = "smc";
33 };
34
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 a53_0: cpu@0 {
40 device_type = "cpu";
41 compatible = "arm,cortex-a53", "arm,armv8";
42 reg = <0>;

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63
64 extalr_clk: extalr {
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 /* This value must be overridden by the board */
68 clock-frequency = <0>;
69 };
70
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 a53_0: cpu@0 {
35 device_type = "cpu";
36 compatible = "arm,cortex-a53", "arm,armv8";
37 reg = <0>;

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58
59 extalr_clk: extalr {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 /* This value must be overridden by the board */
63 clock-frequency = <0>;
64 };
65
66 psci {
67 compatible = "arm,psci-1.0", "arm,psci-0.2";
68 method = "smc";
69 };
70
71 /* External SCIF clock - to be overridden by boards that provide it */
72 scif_clk: scif {
73 compatible = "fixed-clock";
74 #clock-cells = <0>;
75 clock-frequency = <0>;
76 };
77
78 soc {

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71 /* External SCIF clock - to be overridden by boards that provide it */
72 scif_clk: scif {
73 compatible = "fixed-clock";
74 #clock-cells = <0>;
75 clock-frequency = <0>;
76 };
77
78 soc {

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