r8a77970.dtsi (89cb3a4c976189a5c6529ee5f5db712949080470) r8a77970.dtsi (dd809b7de27cff710658febdde65304ec1a3ea82)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8

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204 resets = <&cpg 907>;
205 };
206
207 pfc: pin-controller@e6060000 {
208 compatible = "renesas,pfc-r8a77970";
209 reg = <0 0xe6060000 0 0x504>;
210 };
211
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8

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204 resets = <&cpg 907>;
205 };
206
207 pfc: pin-controller@e6060000 {
208 compatible = "renesas,pfc-r8a77970";
209 reg = <0 0xe6060000 0 0x504>;
210 };
211
212 cmt0: timer@e60f0000 {
213 compatible = "renesas,r8a77970-cmt0",
214 "renesas,rcar-gen3-cmt0";
215 reg = <0 0xe60f0000 0 0x1004>;
216 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
217 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
218 clocks = <&cpg CPG_MOD 303>;
219 clock-names = "fck";
220 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
221 resets = <&cpg 303>;
222 status = "disabled";
223 };
224
225 cmt1: timer@e6130000 {
226 compatible = "renesas,r8a77970-cmt1",
227 "renesas,rcar-gen3-cmt1";
228 reg = <0 0xe6130000 0 0x1004>;
229 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
231 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
232 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
233 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
234 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
236 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
237 clocks = <&cpg CPG_MOD 302>;
238 clock-names = "fck";
239 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
240 resets = <&cpg 302>;
241 status = "disabled";
242 };
243
244 cmt2: timer@e6140000 {
245 compatible = "renesas,r8a77970-cmt1",
246 "renesas,rcar-gen3-cmt1";
247 reg = <0 0xe6140000 0 0x1004>;
248 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
249 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
251 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
256 clocks = <&cpg CPG_MOD 301>;
257 clock-names = "fck";
258 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
259 resets = <&cpg 301>;
260 status = "disabled";
261 };
262
263 cmt3: timer@e6148000 {
264 compatible = "renesas,r8a77970-cmt1",
265 "renesas,rcar-gen3-cmt1";
266 reg = <0 0xe6148000 0 0x1004>;
267 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
268 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
272 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
273 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
274 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
275 clocks = <&cpg CPG_MOD 300>;
276 clock-names = "fck";
277 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
278 resets = <&cpg 300>;
279 status = "disabled";
280 };
281
212 cpg: clock-controller@e6150000 {
213 compatible = "renesas,r8a77970-cpg-mssr";
214 reg = <0 0xe6150000 0 0x1000>;
215 clocks = <&extal_clk>, <&extalr_clk>;
216 clock-names = "extal", "extalr";
217 #clock-cells = <2>;
218 #power-domain-cells = <0>;
219 #reset-cells = <1>;

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539 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
540 <&dmac2 0x59>, <&dmac2 0x58>;
541 dma-names = "tx", "rx", "tx", "rx";
542 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
543 resets = <&cpg 203>;
544 status = "disabled";
545 };
546
282 cpg: clock-controller@e6150000 {
283 compatible = "renesas,r8a77970-cpg-mssr";
284 reg = <0 0xe6150000 0 0x1000>;
285 clocks = <&extal_clk>, <&extalr_clk>;
286 clock-names = "extal", "extalr";
287 #clock-cells = <2>;
288 #power-domain-cells = <0>;
289 #reset-cells = <1>;

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609 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
610 <&dmac2 0x59>, <&dmac2 0x58>;
611 dma-names = "tx", "rx", "tx", "rx";
612 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
613 resets = <&cpg 203>;
614 status = "disabled";
615 };
616
617 tpu: pwm@e6e80000 {
618 compatible = "renesas,tpu-r8a77970", "renesas,tpu";
619 reg = <0 0xe6e80000 0 0x148>;
620 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
621 clocks = <&cpg CPG_MOD 304>;
622 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
623 resets = <&cpg 304>;
624 #pwm-cells = <3>;
625 status = "disabled";
626 };
547
548 vin0: video@e6ef0000 {
549 compatible = "renesas,vin-r8a77970";
550 reg = <0 0xe6ef0000 0 0x1000>;
551 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&cpg CPG_MOD 811>;
553 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
554 resets = <&cpg 811>;

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628 vin0: video@e6ef0000 {
629 compatible = "renesas,vin-r8a77970";
630 reg = <0 0xe6ef0000 0 0x1000>;
631 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
632 clocks = <&cpg CPG_MOD 811>;
633 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
634 resets = <&cpg 811>;

--- 359 unchanged lines hidden ---