r8a77970.dtsi (747bbcd3aacd95fe200cdda415dba02e872946b5) r8a77970.dtsi (6af663af3c46300032fd7a783bdc3e585035438f)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8

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552 };
553
554 canfd: can@e66c0000 {
555 compatible = "renesas,r8a77970-canfd",
556 "renesas,rcar-gen3-canfd";
557 reg = <0 0xe66c0000 0 0x8000>;
558 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
559 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8

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552 };
553
554 canfd: can@e66c0000 {
555 compatible = "renesas,r8a77970-canfd",
556 "renesas,rcar-gen3-canfd";
557 reg = <0 0xe66c0000 0 0x8000>;
558 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
559 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
560 interrupt-names = "ch_int", "g_int";
560 clocks = <&cpg CPG_MOD 914>,
561 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
562 <&can_clk>;
563 clock-names = "fck", "canfd", "can_clk";
564 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
565 assigned-clock-rates = <40000000>;
566 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
567 resets = <&cpg 914>;

--- 661 unchanged lines hidden --- 		561 clocks = <&cpg CPG_MOD 914>,
562 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
563 <&can_clk>;
564 clock-names = "fck", "canfd", "can_clk";
565 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
566 assigned-clock-rates = <40000000>;
567 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
568 resets = <&cpg 914>;

--- 661 unchanged lines hidden ---