r8a77970.dtsi (57e04eeda515ee979fec3bc3d64c408feae18acc) r8a77970.dtsi (0aab5b914b41601ee7e4ba9bd81344665db1fbca)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8

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313 #thermal-sensor-cells = <0>;
314 };
315
316 intc_ex: interrupt-controller@e61c0000 {
317 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
318 #interrupt-cells = <2>;
319 interrupt-controller;
320 reg = <0 0xe61c0000 0 0x200>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8

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313 #thermal-sensor-cells = <0>;
314 };
315
316 intc_ex: interrupt-controller@e61c0000 {
317 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
318 #interrupt-cells = <2>;
319 interrupt-controller;
320 reg = <0 0xe61c0000 0 0x200>;
321 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
321 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
322 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
323 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
324 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
325 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
326 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
327 clocks = <&cpg CPG_MOD 407>;
328 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
329 resets = <&cpg 407>;
330 };
331
332 tmu0: timer@e61e0000 {
333 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
334 reg = <0 0xe61e0000 0 0x30>;

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928 };
929 };
930 };
931
932 dmac1: dma-controller@e7300000 {
933 compatible = "renesas,dmac-r8a77970",
934 "renesas,rcar-dmac";
935 reg = <0 0xe7300000 0 0x10000>;
327 clocks = <&cpg CPG_MOD 407>;
328 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
329 resets = <&cpg 407>;
330 };
331
332 tmu0: timer@e61e0000 {
333 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
334 reg = <0 0xe61e0000 0 0x30>;

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928 };
929 };
930 };
931
932 dmac1: dma-controller@e7300000 {
933 compatible = "renesas,dmac-r8a77970",
934 "renesas,rcar-dmac";
935 reg = <0 0xe7300000 0 0x10000>;
936 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
937 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
938 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
939 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
940 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
941 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
942 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
943 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
944 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
936 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
937 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
938 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
939 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
940 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
941 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
942 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
943 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
944 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
945 interrupt-names = "error",
946 "ch0", "ch1", "ch2", "ch3",
947 "ch4", "ch5", "ch6", "ch7";
948 clocks = <&cpg CPG_MOD 218>;
949 clock-names = "fck";
950 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
951 resets = <&cpg 218>;
952 #dma-cells = <1>;
953 dma-channels = <8>;
954 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
955 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
956 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
957 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
958 };
959
960 dmac2: dma-controller@e7310000 {
961 compatible = "renesas,dmac-r8a77970",
962 "renesas,rcar-dmac";
963 reg = <0 0xe7310000 0 0x10000>;
945 interrupt-names = "error",
946 "ch0", "ch1", "ch2", "ch3",
947 "ch4", "ch5", "ch6", "ch7";
948 clocks = <&cpg CPG_MOD 218>;
949 clock-names = "fck";
950 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
951 resets = <&cpg 218>;
952 #dma-cells = <1>;
953 dma-channels = <8>;
954 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
955 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
956 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
957 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
958 };
959
960 dmac2: dma-controller@e7310000 {
961 compatible = "renesas,dmac-r8a77970",
962 "renesas,rcar-dmac";
963 reg = <0 0xe7310000 0 0x10000>;
964 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
965 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
966 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
967 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
968 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
969 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
970 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
971 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
972 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
964 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
973 interrupt-names = "error",
974 "ch0", "ch1", "ch2", "ch3",
975 "ch4", "ch5", "ch6", "ch7";
976 clocks = <&cpg CPG_MOD 217>;
977 clock-names = "fck";
978 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
979 resets = <&cpg 217>;
980 #dma-cells = <1>;

--- 225 unchanged lines hidden --- 		973 interrupt-names = "error",
974 "ch0", "ch1", "ch2", "ch3",
975 "ch4", "ch5", "ch6", "ch7";
976 clocks = <&cpg CPG_MOD 217>;
977 clock-names = "fck";
978 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
979 resets = <&cpg 217>;
980 #dma-cells = <1>;

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