r8a77961.dtsi (d1b803f4ca4f25d6f171219d039f9410a10b29ee) r8a77961.dtsi (c6d387612b6659d6ea183cede83bb1635f62d117)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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1387 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1388 <&dmac2 0x5b>, <&dmac2 0x5a>;
1389 dma-names = "tx", "rx", "tx", "rx";
1390 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1391 resets = <&cpg 202>;
1392 status = "disabled";
1393 };
1394
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77961-cpg-mssr.h>

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1387 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1388 <&dmac2 0x5b>, <&dmac2 0x5a>;
1389 dma-names = "tx", "rx", "tx", "rx";
1390 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1391 resets = <&cpg 202>;
1392 status = "disabled";
1393 };
1394
1395 tpu: pwm@e6e80000 {
1396 compatible = "renesas,tpu-r8a77961", "renesas,tpu";
1397 reg = <0 0xe6e80000 0 0x148>;
1398 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1399 clocks = <&cpg CPG_MOD 304>;
1400 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1401 resets = <&cpg 304>;
1402 #pwm-cells = <3>;
1403 status = "disabled";
1404 };
1405
1395 msiof0: spi@e6e90000 {
1396 compatible = "renesas,msiof-r8a77961",
1397 "renesas,rcar-gen3-msiof";
1398 reg = <0 0xe6e90000 0 0x0064>;
1399 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1400 clocks = <&cpg CPG_MOD 211>;
1401 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1402 <&dmac2 0x41>, <&dmac2 0x40>;

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1406 msiof0: spi@e6e90000 {
1407 compatible = "renesas,msiof-r8a77961",
1408 "renesas,rcar-gen3-msiof";
1409 reg = <0 0xe6e90000 0 0x0064>;
1410 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1411 clocks = <&cpg CPG_MOD 211>;
1412 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1413 <&dmac2 0x41>, <&dmac2 0x40>;

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